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1 // Copyright (c) Facebook, Inc. and its affiliates.
2 // All rights reserved.
3 //
4 // Copyright 2019 Google LLC
5 //
6 // This source code is licensed under the BSD-style license found in the
7 // LICENSE file in the root directory of this source tree.
8 
9 #include <assert.h>
10 #include <stdint.h>
11 #include <stddef.h>
12 
13 #include <smmintrin.h>
14 
15 #include <fp16/bitcasts.h>
16 
17 #include <xnnpack/requantization-stubs.h>
18 
19 
xnn_qs8_requantize_gemmlowp__sse4(size_t n,const int32_t * input,float scale,int8_t zero_point,int8_t qmin,int8_t qmax,int8_t * output)20 void xnn_qs8_requantize_gemmlowp__sse4(
21     size_t n,
22     const int32_t* input,
23     float scale,
24     int8_t zero_point,
25     int8_t qmin,
26     int8_t qmax,
27     int8_t* output)
28 {
29   assert(n % 16 == 0);
30   assert(scale < 1.0f);
31   assert(scale >= 0x1.0p-32f);
32 
33   // Compute requantization parameters.
34   const uint32_t scale_bits = fp32_to_bits(scale);
35 
36   // Multiplier is in [0x40000000, 0x7FFFFF80] range.
37   const int32_t multiplier = (int32_t)(((scale_bits & UINT32_C(0x007FFFFF)) | UINT32_C(0x00800000)) << 7);
38   assert(multiplier >= INT32_C(0x40000000));
39   assert(multiplier <= INT32_C(0x7FFFFF80));
40 
41   // Shift is in [0, 31] range.
42   const int32_t shift = 127 + 31 - 32 - (fp32_to_bits(scale) >> 23);
43   assert(shift >= 0);
44   assert(shift < 32);
45 
46   const __m128i vmultiplier = _mm_set1_epi32(multiplier);
47   const __m128i vzero_point = _mm_set1_epi16((short) zero_point);
48   const __m128i vqmin = _mm_set1_epi8((char) qmin);
49   const __m128i vqmax = _mm_set1_epi8((char) qmax);
50   const __m128i vshift = _mm_cvtsi32_si128((int) shift);
51   const uint32_t remainder_mask = (UINT32_C(1) << shift) - UINT32_C(1);
52   const __m128i vremainder_mask = _mm_set1_epi32((int) remainder_mask);
53   const __m128i vthreshold = _mm_set1_epi32((int) (remainder_mask >> 1));
54   const __m128i vq31rounding = _mm_set1_epi64x(UINT64_C(0x40000000));
55   for (; n != 0; n -= 16) {
56     const __m128i x = _mm_loadu_si128((const __m128i*) input);
57     const __m128i y = _mm_loadu_si128((const __m128i*) (input + 4));
58     const __m128i z = _mm_loadu_si128((const __m128i*) (input + 8));
59     const __m128i w = _mm_loadu_si128((const __m128i*) (input + 12));
60     input += 16;
61 
62     const __m128i x_rev = _mm_shuffle_epi32(x, _MM_SHUFFLE(2, 3, 0, 1));
63     const __m128i y_rev = _mm_shuffle_epi32(y, _MM_SHUFFLE(2, 3, 0, 1));
64     const __m128i z_rev = _mm_shuffle_epi32(z, _MM_SHUFFLE(2, 3, 0, 1));
65     const __m128i w_rev = _mm_shuffle_epi32(w, _MM_SHUFFLE(2, 3, 0, 1));
66 
67     const __m128i x_product_even = _mm_add_epi64(_mm_mul_epi32(x, vmultiplier), vq31rounding);
68     const __m128i y_product_even = _mm_add_epi64(_mm_mul_epi32(y, vmultiplier), vq31rounding);
69     const __m128i z_product_even = _mm_add_epi64(_mm_mul_epi32(z, vmultiplier), vq31rounding);
70     const __m128i w_product_even = _mm_add_epi64(_mm_mul_epi32(w, vmultiplier), vq31rounding);
71 
72     const __m128i x_product_odd = _mm_add_epi64(_mm_mul_epi32(x_rev, vmultiplier), vq31rounding);
73     const __m128i y_product_odd = _mm_add_epi64(_mm_mul_epi32(y_rev, vmultiplier), vq31rounding);
74     const __m128i z_product_odd = _mm_add_epi64(_mm_mul_epi32(z_rev, vmultiplier), vq31rounding);
75     const __m128i w_product_odd = _mm_add_epi64(_mm_mul_epi32(w_rev, vmultiplier), vq31rounding);
76 
77     const __m128i x_q31product_even = _mm_srli_epi64(x_product_even, 31);
78     const __m128i x_q31product_odd = _mm_add_epi64(x_product_odd, x_product_odd);
79     const __m128i y_q31product_even = _mm_srli_epi64(y_product_even, 31);
80     const __m128i y_q31product_odd = _mm_add_epi64(y_product_odd, y_product_odd);
81     const __m128i z_q31product_even = _mm_srli_epi64(z_product_even, 31);
82     const __m128i z_q31product_odd = _mm_add_epi64(z_product_odd, z_product_odd);
83     const __m128i w_q31product_even = _mm_srli_epi64(w_product_even, 31);
84     const __m128i w_q31product_odd = _mm_add_epi64(w_product_odd, w_product_odd);
85 
86     const __m128i x_q31product = _mm_blend_epi16(x_q31product_even, x_q31product_odd, 0xCC);
87     const __m128i y_q31product = _mm_blend_epi16(y_q31product_even, y_q31product_odd, 0xCC);
88     const __m128i z_q31product = _mm_blend_epi16(z_q31product_even, z_q31product_odd, 0xCC);
89     const __m128i w_q31product = _mm_blend_epi16(w_q31product_even, w_q31product_odd, 0xCC);
90 
91     const __m128i x_remainder =
92         _mm_add_epi32(_mm_and_si128(x_q31product, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), x_q31product));
93     const __m128i y_remainder =
94         _mm_add_epi32(_mm_and_si128(y_q31product, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), y_q31product));
95     const __m128i z_remainder =
96         _mm_add_epi32(_mm_and_si128(z_q31product, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), z_q31product));
97     const __m128i w_remainder =
98         _mm_add_epi32(_mm_and_si128(w_q31product, vremainder_mask), _mm_cmpgt_epi32(_mm_setzero_si128(), w_q31product));
99 
100     const __m128i x_scaled =
101         _mm_sub_epi32(_mm_sra_epi32(x_q31product, vshift), _mm_cmpgt_epi32(x_remainder, vthreshold));
102     const __m128i y_scaled =
103         _mm_sub_epi32(_mm_sra_epi32(y_q31product, vshift), _mm_cmpgt_epi32(y_remainder, vthreshold));
104     const __m128i z_scaled =
105         _mm_sub_epi32(_mm_sra_epi32(z_q31product, vshift), _mm_cmpgt_epi32(z_remainder, vthreshold));
106     const __m128i w_scaled =
107         _mm_sub_epi32(_mm_sra_epi32(w_q31product, vshift), _mm_cmpgt_epi32(w_remainder, vthreshold));
108 
109     const __m128i xy_packed = _mm_adds_epi16(_mm_packs_epi32(x_scaled, y_scaled), vzero_point);
110     const __m128i zw_packed = _mm_adds_epi16(_mm_packs_epi32(z_scaled, w_scaled), vzero_point);
111     const __m128i xyzw_packed = _mm_packs_epi16(xy_packed, zw_packed);
112     const __m128i xyzw_clamped = _mm_max_epi8(_mm_min_epi8(xyzw_packed, vqmax), vqmin);
113 
114     // 4x PSHUFD
115     // 8x PMULDQ
116     // 12x PADDQ
117     // 4x PADDD
118     // 4x PSUBD
119     // 4x PSLRQ (immediate)
120     // 4x PSRAD (register)
121     // 4x PBLENDW
122     // 4x PAND
123     // 4x PXOR (setzero)
124     // 8x PCMPGTD
125     // 2x PACKSSDW
126     // 2x PADDSW
127     // 1x PACKSSWB
128     // 1x PMAXSB
129     // 1x PMINSB
130     // ---------------------
131     // 67 instructions total
132 
133     _mm_storeu_si128((__m128i*) output, xyzw_clamped);
134     output += 16;
135   }
136 }
137