1 /*
2 * Copyright (c) 2020 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "arm_compute/runtime/CL/functions/CLLogicalAnd.h"
25 #include "arm_compute/core/CL/ICLTensor.h"
26 #include "src/core/CL/kernels/CLElementwiseOperationKernel.h"
27 #include "support/MemorySupport.h"
28
29 #include <utility>
30
31 namespace arm_compute
32 {
33 namespace experimental
34 {
configure(const CLCompileContext & compile_context,ITensorInfo * input1,ITensorInfo * input2,ITensorInfo * output)35 void CLLogicalAnd::configure(const CLCompileContext &compile_context, ITensorInfo *input1, ITensorInfo *input2, ITensorInfo *output)
36 {
37 auto k = arm_compute::support::cpp14::make_unique<CLLogicalBinaryKernel>();
38 k->configure(compile_context, kernels::LogicalOperation::And, input1, input2, output);
39 _kernel = std::move(k);
40 }
41
validate(const ITensorInfo * input1,const ITensorInfo * input2,const ITensorInfo * output)42 Status CLLogicalAnd::validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output)
43 {
44 return CLLogicalBinaryKernel::validate(kernels::LogicalOperation::And, input1, input2, output);
45 }
46
run(ITensorPack & tensors)47 void CLLogicalAnd::run(ITensorPack &tensors)
48 {
49 ICLOperator::run(tensors);
50 }
51 } // namespace experimental
52
53 struct CLLogicalAnd::Impl
54 {
55 const ICLTensor *src0{ nullptr };
56 const ICLTensor *src1{ nullptr };
57 ICLTensor *dst{ nullptr };
58 std::unique_ptr<experimental::CLLogicalAnd> op{ nullptr };
59 };
60
CLLogicalAnd()61 CLLogicalAnd::CLLogicalAnd()
62 : _impl(support::cpp14::make_unique<Impl>())
63 {
64 }
65 CLLogicalAnd::CLLogicalAnd(CLLogicalAnd &&) = default;
66 CLLogicalAnd &CLLogicalAnd::operator=(CLLogicalAnd &&) = default;
67 CLLogicalAnd::~CLLogicalAnd() = default;
68
configure(ICLTensor * input1,ICLTensor * input2,ICLTensor * output)69 void CLLogicalAnd::configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output)
70 {
71 configure(CLKernelLibrary::get().get_compile_context(), input1, input2, output);
72 }
73
configure(const CLCompileContext & compile_context,ICLTensor * input1,ICLTensor * input2,ICLTensor * output)74 void CLLogicalAnd::configure(const CLCompileContext &compile_context, ICLTensor *input1, ICLTensor *input2, ICLTensor *output)
75 {
76 _impl->src0 = input1;
77 _impl->src1 = input2;
78 _impl->dst = output;
79 _impl->op = arm_compute::support::cpp14::make_unique<experimental::CLLogicalAnd>();
80 _impl->op->configure(compile_context, input1->info(), input2->info(), output->info());
81 }
82
validate(const ITensorInfo * input1,const ITensorInfo * input2,const ITensorInfo * output)83 Status CLLogicalAnd::validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output)
84 {
85 return experimental::CLLogicalAnd::validate(input1, input2, output);
86 }
87
run()88 void CLLogicalAnd::run()
89 {
90 ITensorPack pack;
91 pack.add_tensor(TensorType::ACL_SRC_0, _impl->src0);
92 pack.add_tensor(TensorType::ACL_SRC_1, _impl->src1);
93 pack.add_tensor(TensorType::ACL_DST, _impl->dst);
94
95 _impl->op->run(pack);
96 }
97 } // namespace arm_compute
98