1 /*
2 * Copyright (c) 2019-2020 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "arm_compute/runtime/NEON/functions/NEFFT2D.h"
25
26 #include "arm_compute/core/ITensor.h"
27 #include "arm_compute/core/Validate.h"
28 #include "arm_compute/runtime/Scheduler.h"
29 #include "src/core/NEON/kernels/NEFFTDigitReverseKernel.h"
30 #include "src/core/NEON/kernels/NEFFTRadixStageKernel.h"
31 #include "src/core/NEON/kernels/NEFFTScaleKernel.h"
32
33 namespace arm_compute
34 {
35 NEFFT2D::~NEFFT2D() = default;
36
NEFFT2D(std::shared_ptr<IMemoryManager> memory_manager)37 NEFFT2D::NEFFT2D(std::shared_ptr<IMemoryManager> memory_manager)
38 : _memory_group(memory_manager), _first_pass_func(memory_manager), _second_pass_func(memory_manager), _first_pass_tensor()
39 {
40 }
41
configure(const ITensor * input,ITensor * output,const FFT2DInfo & config)42 void NEFFT2D::configure(const ITensor *input, ITensor *output, const FFT2DInfo &config)
43 {
44 ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
45 ARM_COMPUTE_ERROR_THROW_ON(NEFFT2D::validate(input->info(), output->info(), config));
46
47 // Setup first pass
48 FFT1DInfo first_pass_config;
49 first_pass_config.axis = config.axis0;
50 first_pass_config.direction = config.direction;
51 _memory_group.manage(&_first_pass_tensor);
52 _first_pass_func.configure(input, &_first_pass_tensor, first_pass_config);
53
54 // Setup second pass
55 FFT1DInfo second_pass_config;
56 second_pass_config.axis = config.axis1;
57 second_pass_config.direction = config.direction;
58 _second_pass_func.configure(&_first_pass_tensor, output, second_pass_config);
59 _first_pass_tensor.allocator()->allocate();
60 }
61
validate(const ITensorInfo * input,const ITensorInfo * output,const FFT2DInfo & config)62 Status NEFFT2D::validate(const ITensorInfo *input, const ITensorInfo *output, const FFT2DInfo &config)
63 {
64 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
65
66 // Create intermediate tensor info
67 TensorInfo first_pass_tensor(input->clone()->set_is_resizable(true).reset_padding().set_num_channels(2));
68
69 // Validate first pass
70 FFT1DInfo first_pass_config;
71 first_pass_config.axis = config.axis0;
72 first_pass_config.direction = config.direction;
73 ARM_COMPUTE_RETURN_ON_ERROR(NEFFT1D::validate(input, &first_pass_tensor, first_pass_config));
74
75 // Validate second pass
76 FFT1DInfo second_pass_config;
77 second_pass_config.axis = config.axis1;
78 second_pass_config.direction = config.direction;
79 ARM_COMPUTE_RETURN_ON_ERROR(NEFFT1D::validate(&first_pass_tensor, output, second_pass_config));
80
81 // Checks performed when output is configured
82 if((output != nullptr) && (output->total_size() != 0))
83 {
84 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(input, output);
85 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
86 }
87
88 return Status{};
89 }
90
run()91 void NEFFT2D::run()
92 {
93 _memory_group.acquire();
94
95 _first_pass_func.run();
96 _second_pass_func.run();
97
98 _memory_group.release();
99 }
100 } // namespace arm_compute
101