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Searched refs:Arm64ManagedRegister (Results 1 – 9 of 9) sorted by relevance

/art/compiler/utils/arm64/
Dmanaged_register_arm64_test.cc26 TEST(Arm64ManagedRegister, NoRegister) { in TEST() argument
27 Arm64ManagedRegister reg = ManagedRegister::NoRegister().AsArm64(); in TEST()
33 TEST(Arm64ManagedRegister, XRegister) { in TEST() argument
34 Arm64ManagedRegister reg = Arm64ManagedRegister::FromXRegister(X0); in TEST()
35 Arm64ManagedRegister wreg = Arm64ManagedRegister::FromWRegister(W0); in TEST()
44 reg = Arm64ManagedRegister::FromXRegister(X1); in TEST()
45 wreg = Arm64ManagedRegister::FromWRegister(W1); in TEST()
54 reg = Arm64ManagedRegister::FromXRegister(X7); in TEST()
55 wreg = Arm64ManagedRegister::FromWRegister(W7); in TEST()
64 reg = Arm64ManagedRegister::FromXRegister(X15); in TEST()
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Dmanaged_register_arm64.h57 class Arm64ManagedRegister : public ManagedRegister {
132 constexpr bool IsSameType(Arm64ManagedRegister test) const { in IsSameType()
144 bool Overlaps(const Arm64ManagedRegister& other) const;
148 static constexpr Arm64ManagedRegister FromXRegister(XRegister r) { in FromXRegister()
153 static constexpr Arm64ManagedRegister FromWRegister(WRegister r) { in FromWRegister()
158 static constexpr Arm64ManagedRegister FromDRegister(DRegister r) { in FromDRegister()
163 static constexpr Arm64ManagedRegister FromSRegister(SRegister r) { in FromSRegister()
170 static constexpr Arm64ManagedRegister FromWRegisterX(WRegister r) { in FromWRegisterX()
176 static constexpr Arm64ManagedRegister FromSRegisterD(SRegister r) { in FromSRegisterD()
205 explicit constexpr Arm64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} in Arm64ManagedRegister() function
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Dmanaged_register_arm64.cc43 bool Arm64ManagedRegister::Overlaps(const Arm64ManagedRegister& other) const { in Overlaps()
48 int Arm64ManagedRegister::RegNo() const { in RegNo()
65 int Arm64ManagedRegister::RegIdLow() const { in RegIdLow()
77 int Arm64ManagedRegister::RegIdHigh() const { in RegIdHigh()
86 void Arm64ManagedRegister::Print(std::ostream& os) const { in Print()
102 std::ostream& operator<<(std::ostream& os, const Arm64ManagedRegister& reg) { in operator <<()
Djni_macro_assembler_arm64.cc92 Arm64ManagedRegister src = m_src.AsArm64(); in CoreRegisterWithSize()
103 return Arm64ManagedRegister::FromWRegister(enum_cast<WRegister>(id)); in CoreRegisterWithSize()
110 return Arm64ManagedRegister::FromXRegister(enum_cast<XRegister>(id)); in CoreRegisterWithSize()
169 Store(Arm64ManagedRegister::FromXRegister(SP), MemberOffset(offs.Int32Value()), m_src, size); in Store()
176 Arm64ManagedRegister base = m_base.AsArm64(); in Store()
177 Arm64ManagedRegister src = m_src.AsArm64(); in Store()
195 Arm64ManagedRegister src = m_src.AsArm64(); in StoreRef()
202 Arm64ManagedRegister src = m_src.AsArm64(); in StoreRawPtr()
293 void Arm64JNIMacroAssembler::Load(Arm64ManagedRegister dest, in Load()
339 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRef()
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Dassembler_arm64.cc90 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRawPtr()
91 Arm64ManagedRegister base = m_base.AsArm64(); in LoadRawPtr()
100 Arm64ManagedRegister base = m_base.AsArm64(); in JumpTo()
101 Arm64ManagedRegister scratch = m_scratch.AsArm64(); in JumpTo()
Djni_macro_assembler_arm64.h215 void Load(Arm64ManagedRegister dst, XRegister src, int32_t src_offset, size_t size);
/art/compiler/jni/quick/arm64/
Dcalling_convention_arm64.cc29 Arm64ManagedRegister::FromXRegister(X0),
30 Arm64ManagedRegister::FromXRegister(X1),
31 Arm64ManagedRegister::FromXRegister(X2),
32 Arm64ManagedRegister::FromXRegister(X3),
33 Arm64ManagedRegister::FromXRegister(X4),
34 Arm64ManagedRegister::FromXRegister(X5),
35 Arm64ManagedRegister::FromXRegister(X6),
36 Arm64ManagedRegister::FromXRegister(X7),
62 Arm64ManagedRegister::FromXRegister(X19),
63 Arm64ManagedRegister::FromXRegister(X20), // Note: Marking register.
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/art/compiler/trampolines/
Dtrampoline_compiler.cc99 __ JumpTo(Arm64ManagedRegister::FromXRegister(X0), Offset(offset.Int32Value()), in CreateTrampoline()
100 Arm64ManagedRegister::FromXRegister(IP1)); in CreateTrampoline()
104 __ LoadRawPtr(Arm64ManagedRegister::FromXRegister(IP1), in CreateTrampoline()
105 Arm64ManagedRegister::FromXRegister(X0), in CreateTrampoline()
108 __ JumpTo(Arm64ManagedRegister::FromXRegister(IP1), Offset(offset.Int32Value()), in CreateTrampoline()
109 Arm64ManagedRegister::FromXRegister(IP0)); in CreateTrampoline()
113 __ JumpTo(Arm64ManagedRegister::FromXRegister(TR), Offset(offset.Int32Value()), in CreateTrampoline()
114 Arm64ManagedRegister::FromXRegister(IP0)); in CreateTrampoline()
/art/compiler/utils/
Dmanaged_register.h31 class Arm64ManagedRegister; variable
52 constexpr arm64::Arm64ManagedRegister AsArm64() const;