Home
last modified time | relevance | path

Searched refs:imm (Results 1 – 25 of 26) sorted by relevance

12

/art/test/442-checker-constant-folding/src/
DMain.java1392 long imm = 33L; in ReturnInt33() local
1393 return (int) imm; in ReturnInt33()
1409 float imm = 1.0e34f; in ReturnIntMax() local
1410 return (int) imm; in ReturnIntMax()
1426 double imm = Double.NaN; in ReturnInt0() local
1427 return (int) imm; in ReturnInt0()
1443 int imm = 33; in ReturnLong33() local
1444 return (long) imm; in ReturnLong33()
1460 float imm = 34.0f; in ReturnLong34() local
1461 return (long) imm; in ReturnLong34()
[all …]
/art/compiler/optimizing/
Dscheduler_arm64.cc94 int64_t imm = Int64FromConstant(instr->GetRight()->AsConstant()); in VisitDiv() local
95 if (imm == 0) { in VisitDiv()
98 } else if (imm == 1 || imm == -1) { in VisitDiv()
101 } else if (IsPowerOfTwo(AbsOrMin(imm))) { in VisitDiv()
105 DCHECK(imm <= -2 || imm >= 2); in VisitDiv()
162 int64_t imm = Int64FromConstant(instruction->GetRight()->AsConstant()); in VisitRem() local
163 if (imm == 0) { in VisitRem()
166 } else if (imm == 1 || imm == -1) { in VisitRem()
169 } else if (IsPowerOfTwo(AbsOrMin(imm))) { in VisitRem()
173 DCHECK(imm <= -2 || imm >= 2); in VisitRem()
Dscheduler_arm.cc815 void SchedulingLatencyVisitorARM::HandleDivRemConstantIntegralLatencies(int32_t imm) { in HandleDivRemConstantIntegralLatencies() argument
816 if (imm == 0) { in HandleDivRemConstantIntegralLatencies()
819 } else if (imm == 1 || imm == -1) { in HandleDivRemConstantIntegralLatencies()
821 } else if (IsPowerOfTwo(AbsOrMin(imm))) { in HandleDivRemConstantIntegralLatencies()
836 int32_t imm = Int32ConstantFrom(rhs->AsConstant()); in VisitDiv() local
837 HandleDivRemConstantIntegralLatencies(imm); in VisitDiv()
904 int32_t imm = Int32ConstantFrom(rhs->AsConstant()); in VisitRem() local
905 HandleDivRemConstantIntegralLatencies(imm); in VisitRem()
Dcode_generator_x86_64.cc3717 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); in VisitSub() local
3718 __ subl(first.AsRegister<CpuRegister>(), imm); in VisitSub()
3820 Immediate imm(mul->InputAt(1)->AsIntConstant()->GetValue()); in VisitMul() local
3821 __ imull(out.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>(), imm); in VisitMul()
3978 int64_t imm = Int64FromConstant(second.GetConstant()); in DivRemOneOrMinusOne() local
3980 DCHECK(imm == 1 || imm == -1); in DivRemOneOrMinusOne()
3988 if (imm == -1) { in DivRemOneOrMinusOne()
4000 if (imm == -1) { in DivRemOneOrMinusOne()
4016 int64_t imm = Int64FromConstant(second.GetConstant()); in RemByPowerOfTwo() local
4017 DCHECK(IsPowerOfTwo(AbsOrMin(imm))); in RemByPowerOfTwo()
[all …]
Dscheduler_arm.h127 void HandleDivRemConstantIntegralLatencies(int32_t imm);
Dcode_generator_arm64.cc3156 int64_t imm = Int64FromLocation(instruction->GetLocations()->InAt(1)); in FOR_EACH_CONDITION_INSTRUCTION() local
3157 uint64_t abs_imm = static_cast<uint64_t>(AbsOrMin(imm)); in FOR_EACH_CONDITION_INSTRUCTION()
3203 if (imm > 0) { in FOR_EACH_CONDITION_INSTRUCTION()
3262 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant() local
3263 DCHECK_GT(imm, 0); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3267 CalculateMagicAndShiftForDivRem(imm, /* is_long= */ true, &magic, &shift); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3296 GenerateResultRemWithAnyConstant(out, dividend, temp, imm, &temps); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3313 int64_t imm = Int64FromConstant(second.GetConstant()); in GenerateInt64DivRemWithAnyConstant() local
3317 CalculateMagicAndShiftForDivRem(imm, /* is_long= */ true, &magic, &shift); in GenerateInt64DivRemWithAnyConstant()
3337 if (NeedToAddDividend(magic, imm)) { in GenerateInt64DivRemWithAnyConstant()
[all …]
Dcode_generator_x86.cc3679 Immediate imm(mul->InputAt(1)->AsIntConstant()->GetValue()); in VisitMul() local
3680 __ imull(out.AsRegister<Register>(), first.AsRegister<Register>(), imm); in VisitMul()
3921 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in DivRemOneOrMinusOne() local
3923 DCHECK(imm == 1 || imm == -1); in DivRemOneOrMinusOne()
3929 if (imm == -1) { in DivRemOneOrMinusOne()
3942 int32_t imm = Int64FromConstant(second.GetConstant()); in RemByPowerOfTwo() local
3943 DCHECK(IsPowerOfTwo(AbsOrMin(imm))); in RemByPowerOfTwo()
3944 uint32_t abs_imm = static_cast<uint32_t>(AbsOrMin(imm)); in RemByPowerOfTwo()
3962 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); in DivByPowerOfTwo() local
3963 DCHECK(IsPowerOfTwo(AbsOrMin(imm))); in DivByPowerOfTwo()
[all …]
Dcode_generator_arm_vixl.cc4300 int32_t imm = Int32ConstantFrom(second); in DivRemOneOrMinusOne() local
4301 DCHECK(imm == 1 || imm == -1); in DivRemOneOrMinusOne()
4306 if (imm == 1) { in DivRemOneOrMinusOne()
4324 int32_t imm = Int32ConstantFrom(second); in DivRemByPowerOfTwo() local
4325 uint32_t abs_imm = static_cast<uint32_t>(AbsOrMin(imm)); in DivRemByPowerOfTwo()
4328 auto generate_div_code = [this, imm, ctz_imm](vixl32::Register out, vixl32::Register in) { in DivRemByPowerOfTwo()
4330 if (imm < 0) { in DivRemByPowerOfTwo()
4406 int32_t imm = Int32ConstantFrom(second); in GenerateDivRemWithAnyConstant() local
4410 CalculateMagicAndShiftForDivRem(imm, /* is_long= */ false, &magic, &shift); in GenerateDivRemWithAnyConstant()
4444 if (imm > 0 && HasNonNegativeInputAt(instruction, 0)) { in GenerateDivRemWithAnyConstant()
[all …]
/art/compiler/utils/x86_64/
Dassembler_x86_64.h440 void pushq(const Immediate& imm);
456 void movq(const Address& dst, const Immediate& imm);
458 void movl(const Address& dst, const Immediate& imm);
470 void movb(const Address& dst, const Immediate& imm);
478 void movw(const Address& dst, const Immediate& imm);
645 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
646 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
726 void shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm);
727 void shufps(XmmRegister dst, XmmRegister src, const Immediate& imm);
728 void pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm);
[all …]
Dassembler_x86_64.cc114 void X86_64Assembler::pushq(const Immediate& imm) { in pushq() argument
116 CHECK(imm.is_int32()); // pushq only supports 32b immediate. in pushq()
117 if (imm.is_int8()) { in pushq()
119 EmitUint8(imm.value() & 0xFF); in pushq()
122 EmitImmediate(imm); in pushq()
142 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { in movq() argument
144 if (imm.is_int32()) { in movq()
149 EmitInt32(static_cast<int32_t>(imm.value())); in movq()
153 EmitInt64(imm.value()); in movq()
158 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { in movl() argument
[all …]
Djni_macro_assembler_x86_64.h66 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm) override;
Djni_macro_assembler_x86_64.cc209 void X86_64JNIMacroAssembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm) { in StoreImmediateToFrame() argument
210 __ movl(Address(CpuRegister(RSP), dest), Immediate(imm)); // TODO(64) movq? in StoreImmediateToFrame()
Dassembler_x86_64_test.cc113 x86_64::Immediate imm(value); in TEST() local
114 EXPECT_FALSE(imm.is_int8()); in TEST()
115 EXPECT_FALSE(imm.is_int16()); in TEST()
116 EXPECT_FALSE(imm.is_int32()); in TEST()
/art/compiler/utils/x86/
Dassembler_x86.cc115 void X86Assembler::pushl(const Immediate& imm) { in pushl() argument
117 if (imm.is_int8()) { in pushl()
119 EmitUint8(imm.value() & 0xFF); in pushl()
122 EmitImmediate(imm); in pushl()
140 void X86Assembler::movl(Register dst, const Immediate& imm) { in movl() argument
143 EmitImmediate(imm); in movl()
168 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl() argument
172 EmitImmediate(imm); in movl()
325 void X86Assembler::movb(const Address& dst, const Immediate& imm) { in movb() argument
329 CHECK(imm.is_int8()); in movb()
[all …]
Dassembler_x86.h395 void pushl(const Immediate& imm);
405 void movl(const Address& dst, const Immediate& imm);
424 void rorl(Register reg, const Immediate& imm);
426 void roll(Register reg, const Immediate& imm);
435 void movb(const Address& dst, const Immediate& imm);
443 void movw(const Address& dst, const Immediate& imm);
605 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
606 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
687 void shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm);
688 void shufps(XmmRegister dst, XmmRegister src, const Immediate& imm);
[all …]
Djni_macro_assembler_x86.h65 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm) override;
Djni_macro_assembler_x86.cc180 void X86JNIMacroAssembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm) { in StoreImmediateToFrame() argument
181 __ movl(Address(ESP, dest), Immediate(imm)); in StoreImmediateToFrame()
/art/compiler/utils/arm/
Dassembler_arm_vixl.h151 void Vmov(vixl32::DRegister rd, double imm) { in Vmov() argument
152 if (vixl::VFP::IsImmFP64(imm)) { in Vmov()
153 MacroAssembler::Vmov(rd, imm); in Vmov()
155 MacroAssembler::Vldr(rd, imm); in Vmov()
Djni_macro_assembler_arm_vixl.h69 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm) override;
/art/compiler/utils/
Dassembler_test.h214 for (int64_t imm : imms) { variable
215 ImmType new_imm = CreateImmediate(imm);
236 sreg << imm * multiplier + bias;
270 for (int64_t imm : imms) { in RepeatTemplatedRegistersImmBits() local
271 ImmType new_imm = CreateImmediate(imm); in RepeatTemplatedRegistersImmBits()
298 sreg << imm + bias; in RepeatTemplatedRegistersImmBits()
331 for (int64_t imm : imms) { in RepeatTemplatedImmBitsRegisters() local
332 ImmType new_imm = CreateImmediate(imm); in RepeatTemplatedImmBitsRegisters()
353 sreg << imm; in RepeatTemplatedImmBitsRegisters()
381 for (int64_t imm : imms) { in RepeatTemplatedRegisterImmBits() local
[all …]
Dassembler_thumb_test_expected.cc.inc81 " 102: 71 d1 bne 0x1e8 @ imm = #226\n"
138 " 1e4: 00 f0 02 b8 b.w 0x1ec @ imm = #4\n"
139 " 1e8: 00 f0 1b b8 b.w 0x222 @ imm = #54\n"
Djni_macro_assembler.h124 virtual void StoreImmediateToFrame(FrameOffset dest, uint32_t imm) = 0;
/art/dex2oat/linker/arm/
Drelative_patcher_thumb2.cc79 uint32_t imm = (diff16 >> 11) & 0x1u; in PatchPcRelativeReference() local
82 insn = (insn & 0xfbf08f00u) | (imm << 26) | (imm4 << 16) | (imm3 << 12) | imm8; in PatchPcRelativeReference()
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.h73 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm) override;
Djni_macro_assembler_arm64.cc207 void Arm64JNIMacroAssembler::StoreImmediateToFrame(FrameOffset offs, uint32_t imm) { in StoreImmediateToFrame() argument
210 ___ Mov(scratch, imm); in StoreImmediateToFrame()

12