/art/runtime/interpreter/mterp/armng/ |
D | invoke.S | 17 FETCH r1, 2 19 and r1, r1, #0xf 21 GET_VREG r1, r1 22 cmp r1, #0 27 ldr r1, [sp] 59 FETCH r1, 2 60 and r1, r1, #0xf 61 GET_VREG r1, r1 62 cmp r1, #0 70 FETCH r1, 2 [all …]
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D | arithmetic.S | 22 GET_VREG r1, r3 @ r1<- vCC 25 cmp r1, #0 @ is second operand zero? 55 GET_VREG r1, r3 @ r1<- vB 58 cmp r1, #0 @ is second operand zero? 84 FETCH_S r1, 1 @ r1<- ssssCCCC (sign-extended) 89 cmp r1, #0 @ is second operand zero? 123 $extract @ optional; typically r1<- ssssssCC (sign extended) 125 @cmp r1, #0 @ is second operand zero? 160 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1<- vBB/vBB+1 191 mov r1, rINST, lsr #12 @ r1<- B [all …]
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D | object.S | 12 cmp r1, r2 21 ldr r1, [sp] 24 mov r1, r0 28 ldr r3, [r1, #MIRROR_CLASS_ACCESS_FLAGS_OFFSET] 31 ldr r3, [r1, #MIRROR_CLASS_COMPONENT_TYPE_OFFSET] 36 cmp r1, r2 79 cmp r1, r2 84 ubfx r1, rINST, #8, #4 // r1<- A 85 SET_VREG r0, r1 92 ldr r1, [sp] [all …]
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D | other.S | 8 FETCH r1, 2 @ r1<- BBBB (high) 10 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb 26 sbfx r1, rINST, #12, #4 @ r1<- sssssssB (sign-extended) 30 SET_VREG r1, r0 @ fp[A]<- r1 49 mov r1, rINST, lsr #8 @ r1<- AA 56 SET_VREG_OBJECT r0, r1 // vAA <- value 61 ldr r1, [sp] 89 FETCH r1, 2 @ r1<- BBBB (low middle) 91 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb (low word) 94 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word) [all …]
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D | array.S | 12 GET_VREG r1, r3 @ r1<- vCC (requested index) 16 add r0, r0, r1, lsl #$shift @ r0<- arrayObj + index*width 17 cmp r1, r3 @ compare unsigned index, length 73 GET_VREG r1, r3 @ r1<- vCC (requested index) 77 cmp r1, r3 @ compare unsigned index, length 86 add r0, r0, r1, lsl #$shift @ r0<- arrayObj + index*width 93 add r0, r0, r1, lsl #$shift @ r0<- arrayObj + index*width 123 mov r1, rINST, lsr #12 @ r1<- B 125 GET_VREG r0, r1 @ r0<- vB (object ref) 138 FETCH r1, 2 @ r1<- BBBB (hi) [all …]
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D | control_flow.S | 9 mov r1, rINST, lsr #12 @ r1<- B 11 GET_VREG r3, r1 @ r3<- vB 77 FETCH r1, 2 // r1<- AAAA (hi) 78 orrs rINST, r0, r1, lsl #16 // wINST<- AAAAaaaa 129 FETCH r1, 2 @ r1<- BBBB (hi) 131 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb 132 GET_VREG r1, r3 @ r1<- vAA 152 GET_VREG_WIDE_BY_ADDR r0, r1, r2 // r0,r1 <- vAA 155 vmov d0, r0, r1 186 mov r1, rSELF
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D | main.S | 465 mov r1, #0 611 str r1, [rNEW_FP, rINST] 612 str r1, [r4, rINST] 667 str r1, [rNEW_FP, r0] 668 str r1, [r4, r0] 684 mov r1, rPC 688 mov r1, rPC 692 FETCH r1, 1 921 vmov r0, r1, d0 931 FETCH r1, 1 [all …]
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/art/runtime/arch/arm/ |
D | memcmp16_arm.S | 33 pld [r1, #0] 36 cmp r0, r1 56 pld [r1, #32] 59 ldrh ip, [r1], #2 78 ldrh ip, [r1], #2 91 eor r0, r3, r1 101 ldr ip, [r1] 107 pld [r1, #64] 109 ldr lr, [r1, #4]! 112 ldreq ip, [r1, #4]! [all …]
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D | quick_entrypoints_arm.S | 73 .cfi_rel_offset r1, 4 96 .cfi_restore r1 455 strd r0, [r10] @ Store r0/r1 into result pointer 465 mov r1, r0 467 bl memcpy @ memcpy (dest r0, src r1, bytes r2) 477 vldm r1, {s0-s31} @ Load all fprs from argument fprs_. 502 LOCK_OBJECT_FAST_PATH r0, r1, r2, r3, .Llock_object_slow, /*can_be_null*/ 1 515 SETUP_SAVE_REFS_ONLY_FRAME r1 @ save callee saves in case we block 516 mov r1, rSELF @ pass Thread::Current 531 UNLOCK_OBJECT_FAST_PATH r0, r1, r2, r3, .Lunlock_object_slow, /*can_be_null*/ 1 [all …]
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D | jni_entrypoints_arm.S | 66 push {r0-r1, r4, lr} 75 mov r1, \arg2 @ Pass arg2. 82 pop {r0-r1, r4, pc} 92 push {r0, r1, r2, r3, lr} @ spill regs 118 pop {r0, r1, r2, r3, lr} @ restore regs 170 pop {r0, r1, r2, r3} 178 stmia ip, {r1-r3, r5-r8, r10-r11, lr} // LR: Save return address for tail call from JNI stub. 192 pop {r1, lr} 200 ldr ip, [r1, #ART_METHOD_ACCESS_FLAGS_OFFSET] // Load access flags. 210 LOAD_RUNTIME_INSTANCE r1 [all …]
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D | instruction_set_features_assembly_tests.S | 30 mov r1,#1 54 vmov r1, s0 62 vmov s0, r1
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D | asm_support_arm.S | 184 CONDITIONAL_CBZ \reg, r1, \dest 209 push {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves and args. 211 .cfi_rel_offset r1, 0 239 pop {r1-r3, r5-r8, r10-r11, lr} @ 10 words of callee saves and args. 240 .cfi_restore r1 319 RETURN_OR_DELIVER_PENDING_EXCEPTION_REG r1
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/art/runtime/interpreter/mterp/arm64ng/ |
D | floating_point.S | 21 %def fbinopWide(instr="fadd d0, d1, d2", result="d0", r1="d1", r2="d2"): 31 GET_VREG_DOUBLE $r1, w1 // w1<- vBB 57 %def fbinopWide2addr(instr="fadd d0, d0, d1", r0="d0", r1="d1"): 64 GET_VREG_DOUBLE $r1, w1 // x1<- vB 72 %def fcmp(wide="", r1="s1", r2="s2", cond="lt"): 82 % if r1.startswith("d"): 83 GET_VREG_DOUBLE $r1, w2 86 GET_VREG $r1, w2 89 fcmp $r1, $r2 179 % fbinopWide(instr="fadd d0, d1, d2", result="d0", r1="d1", r2="d2") [all …]
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D | arithmetic.S | 130 %def binopWide(preinstr="", instr="add x0, x1, x2", result="x0", r1="x1", r2="x2", chkzero="0"): 149 GET_VREG_WIDE $r1, w1 // w1<- vBB 161 %def binopWide2addr(preinstr="", instr="add x0, x0, x1", r0="x0", r1="x1", chkzero="0"): 178 GET_VREG_WIDE $r1, w1 // x1<- vB 181 cbz $r1, common_errDivideByZero
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/art/test/1922-owned-monitors-info/src/art/ |
D | Test1922.java | 194 for (Function<Runnable, Runnable> r1 = li1.next(); li1.hasNext(); r1 = li1.next()) { in runTestsOtherThread() 203 r1.apply(null).getClass(), in runTestsOtherThread() 209 final Thread thr = new Thread(r1.apply(r2.apply(r3.apply(pause)))); in runTestsOtherThread() 238 for (Function<Runnable, Runnable> r1 = li1.next(); li1.hasNext(); r1 = li1.next()) { in runTestsCurrentThread() 247 r1.apply(null).getClass(), in runTestsCurrentThread() 251 r1.apply(r2.apply(r3.apply(printer))).run(); in runTestsCurrentThread()
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/art/test/1978-regular-obsolete-then-structural-obsolescence/src/art/ |
D | Test1978.java | 40 public static void sayHi(Runnable r1, Runnable r2) { in sayHi() argument 42 r1.run(); in sayHi()
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/art/test/800-smali/smali/ |
D | b_134061982.smali | 22 # Start with r1 == null 32 # Make r1 not-reference.
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D | b_134061983_2.smali | 22 # Start with r1 == null 32 # Make r1 not-reference.
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/art/runtime/gc/ |
D | allocation_record.h | 149 bool operator()(const T* r1, const T* r2) const { in operator() 150 if (r1 == r2) return true; in operator() 151 if (r1 == nullptr || r2 == nullptr) return false; in operator() 152 return *r1 == *r2; in operator()
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/art/test/140-field-packing/src/ |
D | GapOrder.java | 39 public Object r1; field in GapOrder
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/art/openjdkjvmti/ |
D | jvmti_weak_table.h | 206 bool operator()(const art::GcRoot<art::mirror::Object>& r1, in operator() 209 return r1.Read<art::kWithoutReadBarrier>() == r2.Read<art::kWithoutReadBarrier>(); in operator()
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/art/compiler/optimizing/ |
D | code_generator_arm_vixl.h | 53 vixl::aarch32::r1, 100 vixl::aarch32::r1, 220 return helpers::LocationFrom(vixl::aarch32::r1); in GetObjectLocation() 227 ? helpers::LocationFrom(vixl::aarch32::r0, vixl::aarch32::r1) in GetReturnLocation() 235 : helpers::LocationFrom(vixl::aarch32::r1)); in GetSetValueLocation()
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/art/runtime/verifier/ |
D | reg_type_test.cc | 956 for (auto r1 : all) { in TEST_F() local 958 if (r1 == r2) { in TEST_F() 1000 bfs(compute_grey, r1); in TEST_F() 1030 ASSERT_EQ(no_in_edge.size(), 1u) << r1->Dump() << " u " << r2->Dump() in TEST_F() 1034 expectations.emplace_back(*r1, *r2, **no_in_edge.begin()); in TEST_F()
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/art/runtime/gc/allocator/ |
D | rosalloc.h | 643 bool operator()(const RosAlloc::Run* r1, const RosAlloc::Run* r2) const { in operator() 644 return r1 == r2; in operator()
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/art/compiler/jni/ |
D | jni_cfi_test_expected.inc | 51 // 0x0000000c: str r1, [sp, #100]
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