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Searched refs:temp2 (Results 1 – 17 of 17) sorted by relevance

/art/compiler/optimizing/
Dintrinsics_arm_vixl.cc429 vixl32::SRegister temp2 = HighSRegisterFrom(invoke->GetLocations()->GetTemp(0)); in VisitMathRoundFloat() local
445 __ Vmov(temp2, 0.5); in VisitMathRoundFloat()
447 __ Vcmp(F32, temp1, temp2); in VisitMathRoundFloat()
615 const vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2)); in VisitStringCompareTo() local
646 __ Ldr(temp2, MemOperand(arg, count_offset)); in VisitStringCompareTo()
649 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo()
675 __ Eors(temp2, temp2, temp3); in VisitStringCompareTo()
676 __ Lsrs(temp2, temp2, 1u); in VisitStringCompareTo()
712 const vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2)); in GenerateStringCompareToLoop() local
740 __ Ldr(temp2, MemOperand(arg, temp1)); in GenerateStringCompareToLoop()
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Dintrinsics_arm64.cc1707 Register temp2 = WRegisterFrom(locations->GetTemp(2)); in VisitStringCompareTo() local
1741 __ Ldr(temp2, HeapOperand(arg, count_offset)); in VisitStringCompareTo()
1744 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo()
1759 __ Eor(temp2, temp2, Operand(temp3)); in VisitStringCompareTo()
1763 __ Tbnz(temp2, 0, &different_compression); // Does not use flags. in VisitStringCompareTo()
1784 temp2 = temp2.X(); in VisitStringCompareTo()
1789 __ Ldr(temp2, MemOperand(arg.X(), temp1.X())); in VisitStringCompareTo()
1790 __ Cmp(temp4, temp2); in VisitStringCompareTo()
1804 __ Eor(temp1, temp2, temp4); in VisitStringCompareTo()
1824 __ Lsr(temp2, temp2, temp1); in VisitStringCompareTo()
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Dintrinsics_x86.cc102 Register temp2 = locations->GetTemp(1).AsRegister<Register>(); in EmitNativeCode() local
124 __ movl(temp2, Address(src, temp1, ScaleFactor::TIMES_4, adjusted_offset)); in EmitNativeCode()
126 __ leal(temp2, Address(src_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0)); in EmitNativeCode()
127 __ movl(temp2, Address(src, temp2, ScaleFactor::TIMES_4, offset)); in EmitNativeCode()
129 __ MaybeUnpoisonHeapReference(temp2); in EmitNativeCode()
137 DCHECK_NE(temp2, ESP); in EmitNativeCode()
138 DCHECK(0 <= temp2 && temp2 < kNumberOfCpuRegisters) << temp2; in EmitNativeCode()
139 int32_t entry_point_offset = Thread::ReadBarrierMarkEntryPointsOffset<kX86PointerSize>(temp2); in EmitNativeCode()
142 __ MaybePoisonHeapReference(temp2); in EmitNativeCode()
147 __ movl(Address(dest, temp1, ScaleFactor::TIMES_4, adjusted_offset), temp2); in EmitNativeCode()
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Dintrinsics_x86_64.cc909 CpuRegister temp2 = temp2_loc.AsRegister<CpuRegister>(); in VisitSystemArrayCopy() local
1024 __ movl(temp2, Address(src, class_offset)); in VisitSystemArrayCopy()
1030 __ MaybeUnpoisonHeapReference(temp2); in VisitSystemArrayCopy()
1063 invoke, TMP_loc, temp2, component_offset, /* needs_null_check= */ false); in VisitSystemArrayCopy()
1070 __ movl(CpuRegister(TMP), Address(temp2, component_offset)); in VisitSystemArrayCopy()
1079 __ cmpl(temp1, temp2); in VisitSystemArrayCopy()
1142 GetAssembler(), type, src, src_pos, dest, dest_pos, length, temp1, temp2, temp3); in VisitSystemArrayCopy()
1200 __ movl(Address(temp2, 0), CpuRegister(TMP)); in VisitSystemArrayCopy()
1202 __ addl(temp2, Immediate(element_size)); in VisitSystemArrayCopy()
1218 __ movl(Address(temp2, 0), CpuRegister(TMP)); in VisitSystemArrayCopy()
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Dcode_generator_arm_vixl.cc4405 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(1)); in GenerateDivRemWithAnyConstant() local
4415 vixl32::Register temp2) { in GenerateDivRemWithAnyConstant() argument
4419 __ Smull(temp2, out, dividend, temp1); in GenerateDivRemWithAnyConstant()
4421 __ Smull(temp2, temp1, dividend, temp1); in GenerateDivRemWithAnyConstant()
4447 generate_unsigned_div_code(out, dividend, temp1, temp2); in GenerateDivRemWithAnyConstant()
4449 generate_unsigned_div_code(temp1, dividend, temp1, temp2); in GenerateDivRemWithAnyConstant()
4450 __ Mov(temp2, imm); in GenerateDivRemWithAnyConstant()
4451 __ Mls(out, temp1, temp2, dividend); in GenerateDivRemWithAnyConstant()
4456 __ Smull(temp2, temp1, dividend, temp1); in GenerateDivRemWithAnyConstant()
4473 __ Mov(temp2, imm); in GenerateDivRemWithAnyConstant()
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Dcode_generator_x86_64.h543 CpuRegister* temp2 = nullptr);
Dcode_generator_arm_vixl.h372 vixl::aarch32::Register temp2,
Dcode_generator_x86_64.cc596 CpuRegister temp2) in ReadBarrierMarkAndUpdateFieldSlowPathX86_64() argument
603 temp2_(temp2) { in ReadBarrierMarkAndUpdateFieldSlowPathX86_64()
7588 CpuRegister* temp2) { in GenerateReferenceLoadWithBakerReadBarrier() argument
7647 DCHECK(temp2 != nullptr); in GenerateReferenceLoadWithBakerReadBarrier()
7649 instruction, ref, obj, src, /* unpoison_ref_before_marking= */ true, *temp1, *temp2); in GenerateReferenceLoadWithBakerReadBarrier()
Dcode_generator_arm64.cc2829 Register temp2 = temps.AcquireSameSizeAs(array); in VisitArraySet() local
2851 __ Ldr(temp2, HeapOperand(Register(value), class_offset)); in VisitArraySet()
2854 __ Cmp(temp, temp2); in VisitArraySet()
Dcode_generator_x86.cc5936 XmmRegister temp2 = locations->GetTemp(1).AsFpuRegister<XmmRegister>(); in HandleFieldSet() local
5938 __ movd(temp2, value.AsRegisterPairHigh<Register>()); in HandleFieldSet()
5939 __ punpckldq(temp1, temp2); in HandleFieldSet()
/art/runtime/
Dcommon_dex_operations.h232 std::string temp1, temp2, temp3; in DoFieldPutCommon() local
236 field_class->GetDescriptor(&temp2), in DoFieldPutCommon()
Dclass_linker_test.cc273 std::string temp2; in AssertClass() local
275 klass->GetDescriptor(&temp2))); in AssertClass()
/art/test/623-checker-loop-regressions/src/
DMain.java944 int temp2 = x[i] * (byte)(temp0); in testSADAndDotProdCombined0() local
947 s1 += temp2; in testSADAndDotProdCombined0()
972 int temp2 = x[i] * (byte)(temp0); in testSADAndDotProdCombined1() local
974 s0 += temp2; in testSADAndDotProdCombined1()
/art/test/458-checker-instruct-simplification/src/
DMain.java713 int temp2 = -arg2; in $noinline$AddNegs2() local
714 return (temp1 + temp2) | (temp1 + temp2); in $noinline$AddNegs2()
/art/runtime/interpreter/
Dinterpreter_switch_impl-inl.h476 std::string temp1, temp2; in RETURN_OBJECT() local
480 return_type->GetDescriptor(&temp2)); in RETURN_OBJECT()
Dinterpreter_common.cc1355 std::string temp1, temp2; in DoCallCommon() local
1360 arg_type->GetDescriptor(&temp2)); in DoCallCommon()
/art/runtime/mirror/
Dclass.cc508 std::string temp1, temp2; in IsInSamePackage() local
509 return IsInSamePackage(klass1->GetDescriptor(&temp1), klass2->GetDescriptor(&temp2)); in IsInSamePackage()