| /external/deqp/external/vulkancts/modules/vulkan/api/ |
| D | vktApiBufferMemoryRequirementsTestsUtils.hpp | 52 template<class Flag, class Bit, class... Ignored>
53 struct BitsSet : public std::set<std::tuple<Bit, Ignored...>, tc<std::tuple<Bit, Ignored...>>>
55 typedef Bit bit_type;
57 typedef std::tuple<Bit, Ignored...> value_type;
81 bool contains(const Bit& bit) const { in contains()
86 bool any(std::initializer_list<Bit> bits) const { in any()
91 bool all(std::initializer_list<Bit> bits) const { in all()
99 const_iterator find(const Bit& bit) const { in find()
109 const value_type& get(const Bit& bit) const { in get()
114 static Bit extract(const value_type& bit) { in extract()
[all …]
|
| /external/capstone/arch/X86/ |
| D | X86GenRegisterInfo.inc | 658 // GR8 Bit set.
668 // GR8_NOREX Bit set.
678 // VK1 Bit set.
688 // VK2 Bit set.
698 // VK4 Bit set.
708 // VK8 Bit set.
718 // VK1WM Bit set.
728 // VK2WM Bit set.
738 // VK4WM Bit set.
748 // VK8WM Bit set.
[all …]
|
| /external/webrtc/modules/rtp_rtcp/source/ |
| D | rtp_format_vp8_test_helper.cc | 40 int Bit(uint8_t byte, int position) { in Bit() function
80 int x_bit = Bit(buffer[0], 7); in CheckHeader()
81 EXPECT_EQ(Bit(buffer[0], 6), 0); // Reserved. in CheckHeader()
82 EXPECT_EQ(Bit(buffer[0], 5), hdr_info_->nonReference ? 1 : 0); in CheckHeader()
83 EXPECT_EQ(Bit(buffer[0], 4), first ? 1 : 0); in CheckHeader()
108 int i_bit = Bit(buffer[1], 7); in CheckPictureID()
111 int two_byte_picture_id = Bit(buffer[*offset], 7); in CheckPictureID()
126 int l_bit = Bit(buffer[1], 6); in CheckTl0PicIdx()
142 int t_bit = Bit(buffer[1], 5); in CheckTIDAndKeyIdx()
143 int k_bit = Bit(buffer[1], 4); in CheckTIDAndKeyIdx()
[all …]
|
| /external/capstone/arch/ARM/ |
| D | ARMGenRegisterInfo.inc | 1184 // SPR Bit set.
1194 // GPR Bit set.
1204 // GPRwithAPSR Bit set.
1214 // SPR_8 Bit set.
1224 // GPRnopc Bit set.
1234 // rGPR Bit set.
1244 // hGPR Bit set.
1254 // tGPR Bit set.
1264 // GPRnopc_and_hGPR Bit set.
1274 // hGPR_and_rGPR Bit set.
[all …]
|
| /external/capstone/arch/Mips/ |
| D | MipsGenRegisterInfo.inc | 999 // OddSP Bit set.
1009 // CCR Bit set.
1019 // COP2 Bit set.
1029 // COP3 Bit set.
1039 // DSPR Bit set.
1049 // FGR32 Bit set.
1059 // FGRCC Bit set.
1069 // FGRH32 Bit set.
1079 // GPR32 Bit set.
1089 // HWRegs Bit set.
[all …]
|
| /external/capstone/arch/SystemZ/ |
| D | SystemZGenRegisterInfo.inc | 512 // GRX32Bit Bit set.
522 // VR32Bit Bit set.
532 // AR32Bit Bit set.
542 // FP32Bit Bit set.
552 // GR32Bit Bit set.
562 // GRH32Bit Bit set.
572 // ADDR32Bit Bit set.
582 // CCR Bit set.
592 // AnyRegBit Bit set.
602 // AnyRegBit_with_subreg_r32 Bit set.
[all …]
|
| /external/rust/crates/libfuzzer-sys/libfuzzer/ |
| D | FuzzerTracePC.h | 226 unsigned Bit = 0; in CounterToFeature() local
227 /**/ if (Counter >= 128) Bit = 7; in CounterToFeature()
228 else if (Counter >= 32) Bit = 6; in CounterToFeature()
229 else if (Counter >= 16) Bit = 5; in CounterToFeature()
230 else if (Counter >= 8) Bit = 4; in CounterToFeature()
231 else if (Counter >= 4) Bit = 3; in CounterToFeature()
232 else if (Counter >= 3) Bit = 2; in CounterToFeature()
233 else if (Counter >= 2) Bit = 1; in CounterToFeature()
234 return Bit; in CounterToFeature()
|
| /external/capstone/arch/PowerPC/ |
| D | PPCGenRegisterInfo.inc | 733 // GPRC Bit set.
743 // GPRC_NOR0 Bit set.
753 // GPRC_and_GPRC_NOR0 Bit set.
763 // CRBITRC Bit set.
773 // F4RC Bit set.
783 // CRRC Bit set.
793 // CARRYRC Bit set.
803 // CTRRC Bit set.
813 // VRSAVERC Bit set.
823 // VSFRC Bit set.
[all …]
|
| /external/libchrome/base/strings/ |
| D | strcat_unittest.cc | 11 TEST(StrCat, 8Bit) {
20 TEST(StrCat, 16Bit) {
31 TEST(StrAppend, 8Bit) {
47 TEST(StrAppend, 16Bit) {
|
| /external/arm-trusted-firmware/docs/perf/ |
| D | performance-monitoring-unit.rst | 78 - Bit 31.
83 - Bit 29.
90 - Bit 27.
96 - Bit 24.
103 - Bit 26.
126 - Bit 31.
133 - Bit 5.
143 - Bit 0.
|
| /external/capstone/arch/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 1069 // FPR8 Bit set.
1079 // FPR16 Bit set.
1089 // GPR32all Bit set.
1099 // FPR32 Bit set.
1109 // GPR32 Bit set.
1119 // GPR32sp Bit set.
1129 // GPR32common Bit set.
1139 // CCR Bit set.
1149 // GPR32sponly Bit set.
1159 // GPR64all Bit set.
[all …]
|
| /external/scudo/standalone/ |
| D | size_class_map.h | 150 for (u8 Bit = 0; Bit != 64; ++Bit) { in LSBTable() local
151 if (Config::Classes[I] & (1 << Bit)) { in LSBTable()
152 Tab[I] = Bit; in LSBTable()
153 if (Bit < Min) in LSBTable()
154 Min = Bit; in LSBTable()
155 if (Bit > Max) in LSBTable()
156 Max = Bit; in LSBTable()
|
| /external/capstone/arch/Sparc/ |
| D | SparcGenRegisterInfo.inc | 365 // FCCRegs Bit set.
375 // FPRegs Bit set.
385 // IntRegs Bit set.
395 // DFPRegs Bit set.
405 // I64Regs Bit set.
415 // DFPRegs_with_sub_even Bit set.
425 // QFPRegs Bit set.
435 // QFPRegs_with_sub_even Bit set.
|
| /external/clang/test/Parser/ |
| D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) in InterlockedBitTestAndSet() argument
8 mov eax, Bit in InterlockedBitTestAndSet()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/TableGen/ |
| D | Record.h | 416 virtual Init *getBit(unsigned Bit) const = 0;
473 Init *getBit(unsigned Bit) const override { in getBit() argument
502 Init *getBit(unsigned Bit) const override { in getBit() argument
503 assert(Bit < 1 && "Bit index out of range!"); in getBit()
557 Init *getBit(unsigned Bit) const override { in getBit() argument
558 assert(Bit < NumBits && "Bit index out of range!"); in getBit()
559 return getTrailingObjects<Init *>()[Bit]; in getBit()
588 Init *getBit(unsigned Bit) const override { in getBit() argument
589 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit()
619 Init *getBit(unsigned Bit) const override { in getBit() argument
[all …]
|
| /external/llvm/include/llvm/TableGen/ |
| D | Record.h | 366 virtual Init *getBit(unsigned Bit) const = 0;
441 Init *getBit(unsigned Bit) const override { in getBit() argument
468 Init *getBit(unsigned Bit) const override { in getBit() argument
469 assert(Bit < 1 && "Bit index out of range!"); in getBit()
528 Init *getBit(unsigned Bit) const override { in getBit() argument
529 assert(Bit < NumBits && "Bit index out of range!"); in getBit()
530 return getTrailingObjects<Init *>()[Bit]; in getBit()
567 Init *getBit(unsigned Bit) const override { in getBit() argument
568 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit()
605 Init *getBit(unsigned Bit) const override { in getBit() argument
[all …]
|
| /external/capstone/arch/TMS320C64x/ |
| D | TMS320C64xGenRegisterInfo.inc | 235 // GPRegs Bit set.
245 // AFRegs Bit set.
255 // BFRegs Bit set.
265 // ControlRegs Bit set.
|
| /external/libgsm/fuzzer/ |
| D | README.md | 19 | `GSM_VERBOSE` | 0. `Verbosity disabled` 1. `Verbosity enabled` | Bit 0 (LSB) of 1st byte of data.…
20 …gorithm will be used` 1. `Faster version of the algorithm will be used` | Bit 1 (LSB) of 1st byte…
21 …`Disable LTP cut-off optimization` 1. `Enable LTP cut-off optimization` | Bit 2 (LSB) of 1st byte…
22 … WAV49 output in the encoder.` 1. `Enable WAV49 format in the encoder.` | Bit 3 (LSB) of 1st byte…
|
| /external/angle/src/common/ |
| D | bitset_utils_unittest.cpp | 592 TEST(Bit, Test) in TEST() argument
594 EXPECT_EQ(Bit<uint32_t>(0), 1u); in TEST()
595 EXPECT_EQ(Bit<uint32_t>(1), 2u); in TEST()
596 EXPECT_EQ(Bit<uint32_t>(2), 4u); in TEST()
597 EXPECT_EQ(Bit<uint32_t>(3), 8u); in TEST()
598 EXPECT_EQ(Bit<uint32_t>(31), 0x8000'0000u); in TEST()
599 EXPECT_EQ(Bit<uint64_t>(63), static_cast<uint64_t>(0x8000'0000'0000'0000llu)); in TEST()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 1319 // GR8 Bit set.
1329 // GRH8 Bit set.
1339 // GR8_NOREX Bit set.
1349 // GR8_ABCD_H Bit set.
1359 // GR8_ABCD_L Bit set.
1369 // GRH16 Bit set.
1379 // GR16 Bit set.
1389 // GR16_NOREX Bit set.
1399 // VK1 Bit set.
1409 // VK16 Bit set.
[all …]
|
| /external/llvm/docs/CommandGuide/ |
| D | llvm-bcanalyzer.rst | 207 The total number of 32-bit integers encoded using the Variable Bit Rate
212 The total number of 64-bit integers encoded using the Variable Bit Rate encoding
218 the Variable Bit Rate encoding scheme.
223 integers had they not been compressed with the Variable Bit Rage encoding
228 The total number of bytes saved by using the Variable Bit Rate encoding scheme.
288 integers that use the Variable Bit Rate encoding scheme.
294 Bit Rate encoding scheme.
298 The total number of bytes saved in this function by using the Variable Bit
|
| /external/capstone/arch/XCore/ |
| D | XCoreGenRegisterInfo.inc | 90 // RRegs Bit set.
100 // GRRegs Bit set.
|
| /external/llvm/lib/Transforms/IPO/ |
| D | LowerTypeTests.cpp | 179 unsigned Bit = 0; in allocate() local
181 if (BitAllocs[I] < BitAllocs[Bit]) in allocate()
182 Bit = I; in allocate()
184 AllocByteOffset = BitAllocs[Bit]; in allocate()
188 BitAllocs[Bit] = ReqSize; in allocate()
193 AllocMask = 1 << Bit; in allocate()
392 for (auto Bit : BSI.Bits) in createBitSetTest() local
393 Bits |= uint64_t(1) << Bit; in createBitSetTest()
479 Value *Bit = createBitSetTest(ThenB, BSI, BAI, BitOffset); in lowerBitSetCall() local
487 P->addIncoming(Bit, ThenB.GetInsertBlock()); in lowerBitSetCall()
|
| /external/clang/docs/ |
| D | ControlFlowIntegrityDesign.rst | 49 .. csv-table:: Bit Vectors for A, B, C
56 Bit vectors are represented in the object file as byte arrays. By loading
58 test bits from the bit set with a relatively short instruction sequence. Bit
112 Stripping Leading/Trailing Zeros in Bit Vectors
121 .. csv-table:: Bit Vectors for A, B, C
128 Short Inline Bit Vectors
195 those sub-hierarchies need to be (see "Stripping Leading/Trailing Zeros in Bit
270 Eliminating Bit Vector Checks for All-Ones Bit Vectors
366 we can normally apply the `Alignment`_ and `Eliminating Bit Vector Checks
367 for All-Ones Bit Vectors`_ optimizations thus simplifying the check at each
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenRegisterInfo.inc | 1920 // MSA128F16 Bit set.
1930 // CCR Bit set.
1940 // COP0 Bit set.
1950 // COP2 Bit set.
1960 // COP3 Bit set.
1970 // DSPR Bit set.
1980 // FGR32 Bit set.
1990 // FGRCC Bit set.
2000 // GPR32 Bit set.
2010 // HWRegs Bit set.
[all …]
|