| /external/llvm/include/llvm/ADT/ |
| D | SmallBitVector.h | 28 class SmallBitVector {
60 SmallBitVector &TheVector;
64 reference(SmallBitVector &b, unsigned Idx) : TheVector(b), BitPos(Idx) {} in reference()
82 return const_cast<const SmallBitVector &>(TheVector).operator[](BitPos);
140 SmallBitVector() : X(1) {} in SmallBitVector() function
144 explicit SmallBitVector(unsigned s, bool t = false) {
152 SmallBitVector(const SmallBitVector &RHS) { in SmallBitVector() function
159 SmallBitVector(SmallBitVector &&RHS) : X(RHS.X) { in SmallBitVector() function
163 ~SmallBitVector() { in ~SmallBitVector()
275 SmallBitVector &set() { in set()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
| D | SmallBitVector.h | 34 class SmallBitVector {
67 SmallBitVector &TheVector;
71 reference(SmallBitVector &b, unsigned Idx) : TheVector(b), BitPos(Idx) {} in reference()
89 return const_cast<const SmallBitVector &>(TheVector).operator[](BitPos);
141 SmallBitVector() = default;
145 explicit SmallBitVector(unsigned s, bool t = false) {
153 SmallBitVector(const SmallBitVector &RHS) { in SmallBitVector() function
160 SmallBitVector(SmallBitVector &&RHS) : X(RHS.X) { in SmallBitVector() function
164 ~SmallBitVector() { in ~SmallBitVector()
169 using const_set_bits_iterator = const_set_bits_iterator_impl<SmallBitVector>;
[all …]
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceRegAlloc.h | 36 void scan(const SmallBitVector &RegMask);
66 SmallBitVector RegMask;
67 SmallBitVector RegMaskUnfiltered;
68 SmallBitVector Free;
69 SmallBitVector FreeUnfiltered;
70 SmallBitVector PrecoloredUnhandledMask; // Note: only used for dumping
108 void assignFinalRegisters(const SmallBitVector &RegMaskFull);
129 llvm::SmallVector<const SmallBitVector *, REGS_SIZE> RegAliases;
|
| D | IceBitVector.h | 37 class SmallBitVector {
44 SmallBitVector(const SmallBitVector &BV) { *this = BV; } in SmallBitVector() function
46 SmallBitVector &operator=(const SmallBitVector &BV) {
54 SmallBitVector() { reset(); } in SmallBitVector() function
56 explicit SmallBitVector(SizeT S) : SmallBitVector() { in SmallBitVector() function
78 friend class SmallBitVector;
140 SmallBitVector operator&(const SmallBitVector &Rhs) const {
142 SmallBitVector Ret(std::max(size(), Rhs.size()));
149 SmallBitVector operator~() const {
150 SmallBitVector Ret = *this;
[all …]
|
| D | IceRegistersX8664.h | 241 std::array<SmallBitVector, RCX86_NUM> *TypeToRegisterSet, in initRegisterSet() argument
242 std::array<SmallBitVector, Reg_NUM> *RegisterAliases) { in initRegisterSet()
243 SmallBitVector IntegerRegistersI64(Reg_NUM); in initRegisterSet()
244 SmallBitVector IntegerRegistersI32(Reg_NUM); in initRegisterSet()
245 SmallBitVector IntegerRegistersI16(Reg_NUM); in initRegisterSet()
246 SmallBitVector IntegerRegistersI8(Reg_NUM); in initRegisterSet()
247 SmallBitVector FloatRegisters(Reg_NUM); in initRegisterSet()
248 SmallBitVector VectorRegisters(Reg_NUM); in initRegisterSet()
249 SmallBitVector Trunc64To8Registers(Reg_NUM); in initRegisterSet()
250 SmallBitVector Trunc32To8Registers(Reg_NUM); in initRegisterSet()
[all …]
|
| D | IceRegistersX8632.h | 254 std::array<SmallBitVector, RCX86_NUM> *TypeToRegisterSet, in initRegisterSet() argument
255 std::array<SmallBitVector, Reg_NUM> *RegisterAliases) { in initRegisterSet()
256 SmallBitVector IntegerRegistersI32(Reg_NUM); in initRegisterSet()
257 SmallBitVector IntegerRegistersI16(Reg_NUM); in initRegisterSet()
258 SmallBitVector IntegerRegistersI8(Reg_NUM); in initRegisterSet()
259 SmallBitVector FloatRegisters(Reg_NUM); in initRegisterSet()
260 SmallBitVector VectorRegisters(Reg_NUM); in initRegisterSet()
261 SmallBitVector Trunc64To8Registers(Reg_NUM); in initRegisterSet()
262 SmallBitVector Trunc32To8Registers(Reg_NUM); in initRegisterSet()
263 SmallBitVector Trunc16To8Registers(Reg_NUM); in initRegisterSet()
[all …]
|
| D | IceTargetLowering.cpp | 130 void printRegisterSet(Ostream &Str, const SmallBitVector &Bitset, in printRegisterSet()
174 GlobalContext *Ctx, int32_t NumRegs, SmallBitVector TypeToRegisterSet[], in filterTypeToRegisterSet()
178 std::vector<SmallBitVector> UseSet(TypeToRegisterSetSize, in filterTypeToRegisterSet()
179 SmallBitVector(NumRegs)); in filterTypeToRegisterSet()
180 std::vector<SmallBitVector> ExcludeSet(TypeToRegisterSetSize, in filterTypeToRegisterSet()
181 SmallBitVector(NumRegs)); in filterTypeToRegisterSet()
197 std::vector<SmallBitVector> &RegSet) { in filterTypeToRegisterSet()
231 SmallBitVector *TypeBitSet = &TypeToRegisterSet[TypeIndex]; in filterTypeToRegisterSet()
232 SmallBitVector *UseBitSet = &UseSet[TypeIndex]; in filterTypeToRegisterSet()
233 SmallBitVector *ExcludeBitSet = &ExcludeSet[TypeIndex]; in filterTypeToRegisterSet()
[all …]
|
| D | IceTargetLowering.h | 292 virtual SmallBitVector getRegisterSet(RegSetMask Include,
296 virtual const SmallBitVector &
301 virtual const SmallBitVector &
303 virtual const SmallBitVector &getAliasesForRegister(RegNumT) const = 0;
306 void postRegallocSplitting(const SmallBitVector &RegMask);
354 GlobalContext *Ctx, int32_t NumRegs, SmallBitVector TypeToRegisterSet[],
422 SmallBitVector &RegsUsed, size_t *GlobalsSize,
|
| D | IceTargetLoweringMIPS32.h | 70 SmallBitVector getRegisterSet(RegSetMask Include,
72 const SmallBitVector &
78 const SmallBitVector &
84 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override { in getAliasesForRegister()
716 SmallBitVector GPRegsUsed;
721 SmallBitVector VFPRegsUsed;
810 static SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
811 static SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
812 static SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
813 SmallBitVector RegsUsed;
|
| D | IceTargetLoweringARM32.h | 96 SmallBitVector getRegisterSet(RegSetMask Include,
98 const SmallBitVector &
109 const SmallBitVector &
115 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override { in getAliasesForRegister()
1069 static SmallBitVector TypeToRegisterSet[RegARM32::RCARM32_NUM];
1070 static SmallBitVector TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
1071 static SmallBitVector RegisterAliases[RegARM32::Reg_NUM];
1072 SmallBitVector RegsUsed;
1110 SmallBitVector GPRegsUsed;
1115 SmallBitVector VFPRegsUsed;
|
| D | IceTargetLoweringX8632.h | 169 SmallBitVector getRegisterSet(RegSetMask Include,
171 const SmallBitVector &
178 const SmallBitVector &
185 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override { in getAliasesForRegister()
874 static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSet;
875 static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSetUnfiltered;
876 static std::array<SmallBitVector, RegisterSet::Reg_NUM> RegisterAliases;
877 SmallBitVector RegsUsed;
|
| D | IceTargetLoweringX8664.h | 170 SmallBitVector getRegisterSet(RegSetMask Include,
172 const SmallBitVector &
179 const SmallBitVector &
186 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override { in getAliasesForRegister()
863 static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSet;
864 static std::array<SmallBitVector, RCX86_NUM> TypeToRegisterSetUnfiltered;
865 static std::array<SmallBitVector, RegisterSet::Reg_NUM> RegisterAliases;
866 SmallBitVector RegsUsed;
|
| D | IceRegAlloc.cpp | 87 const SmallBitVector &RegMask, in findMinWeightIndex()
782 void LinearScan::assignFinalRegisters(const SmallBitVector &RegMaskFull) { in assignFinalRegisters()
817 void LinearScan::scan(const SmallBitVector &RegMaskFull) { in scan()
840 const SmallBitVector KillsMask = in scan()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Analysis/ |
| D | DependenceAnalysis.h | 348 SmallBitVector Loops;
349 SmallBitVector GroupLoops;
350 SmallBitVector Group;
541 SmallBitVector &Loops) const;
547 SmallBitVector &Loops);
553 SmallBitVector &Loops);
593 SmallBitVector &Loops);
639 const SmallBitVector &Loops,
779 const SmallBitVector &Loops,
816 const SmallBitVector &Loops,
[all …]
|
| /external/llvm/include/llvm/Analysis/ |
| D | DependenceAnalysis.h | 355 SmallBitVector Loops;
356 SmallBitVector GroupLoops;
357 SmallBitVector Group;
548 SmallBitVector &Loops) const;
554 SmallBitVector &Loops);
560 SmallBitVector &Loops);
589 SmallBitVector &Loops);
635 const SmallBitVector &Loops,
775 const SmallBitVector &Loops,
812 const SmallBitVector &Loops,
[all …]
|
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| D | FunctionSummary.h | 35 llvm::SmallBitVector VisitedBasicBlocks;
96 llvm::SmallBitVector &Blocks = I->second.VisitedBasicBlocks; in markVisitedBasicBlock()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | DependenceAnalysis.cpp | 803 SmallBitVector &Loops) const { in collectCommonLoops()
888 SmallBitVector &Loops, bool IsSrc) { in checkSubscript()
914 SmallBitVector &Loops) { in checkSrcSubscript()
921 SmallBitVector &Loops) { in checkDstSubscript()
932 SmallBitVector &Loops) { in classifyPair()
933 SmallBitVector SrcLoops(MaxLevels + 1); in classifyPair()
934 SmallBitVector DstLoops(MaxLevels + 1); in classifyPair()
2285 const SmallBitVector &Loops, in testMIV()
2530 const SmallBitVector &Loops, in banerjeeMIVtest()
2611 const SmallBitVector &Loops, in exploreDirections()
[all …]
|
| /external/llvm/lib/Analysis/ |
| D | DependenceAnalysis.cpp | 768 SmallBitVector &Loops) const { in collectCommonLoops()
854 SmallBitVector &Loops) { in checkSrcSubscript()
879 SmallBitVector &Loops) { in checkDstSubscript()
906 SmallBitVector &Loops) { in classifyPair()
907 SmallBitVector SrcLoops(MaxLevels + 1); in classifyPair()
908 SmallBitVector DstLoops(MaxLevels + 1); in classifyPair()
2208 const SmallBitVector &Loops, in testMIV()
2453 const SmallBitVector &Loops, in banerjeeMIVtest()
2534 const SmallBitVector &Loops, in exploreDirections()
2982 SmallBitVector &Loops, in propagate()
[all …]
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfExpression.cpp | 136 SmallBitVector Coverage(RegSize, false); in AddMachineRegPiece()
145 SmallBitVector Intersection(RegSize, false); in AddMachineRegPiece()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | StatepointLowering.h | 108 SmallBitVector AllocatedStackSlots;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | StatepointLowering.h | 117 SmallBitVector AllocatedStackSlots;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineDominators.cpp | 96 SmallBitVector IsNewIDom(CriticalEdgesToSplit.size(), true); in applySplitCriticalEdges()
|
| /external/llvm/lib/CodeGen/ |
| D | MachineDominators.cpp | 89 SmallBitVector IsNewIDom(CriticalEdgesToSplit.size(), true); in applySplitCriticalEdges()
|
| /external/llvm/lib/ProfileData/Coverage/ |
| D | CoverageMapping.cpp | 424 static SmallBitVector gatherFileIDs(StringRef SourceFile, in gatherFileIDs()
426 SmallBitVector FilenameEquivalence(Function.Filenames.size(), false); in gatherFileIDs()
435 SmallBitVector IsNotExpandedFile(Function.Filenames.size(), true); in findMainViewFileID()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfExpression.cpp | 143 SmallBitVector Coverage(RegSize, false); in addMachineReg()
154 SmallBitVector CurSubReg(RegSize, false); in addMachineReg()
|