| /external/vixl/src/aarch32/ |
| D | location-aarch32.cc | 44 void Location::ResolveReferences(internal::AssemblerBase* assembler) { in ResolveReferences() argument
50 EncodeLocationFor(assembler, from, reference.op()); in ResolveReferences()
59 void Location::EncodeLocationFor(internal::AssemblerBase* assembler, in EncodeLocationFor() argument
64 assembler->GetBuffer()->GetOffsetAddress<uint16_t*>(from); in EncodeLocationFor()
82 assembler->GetBuffer()->GetOffsetAddress<uint32_t*>(from); in EncodeLocationFor()
146 Assembler* assembler = static_cast<Assembler*>(masm->AsAssemblerBase()); in EmitPoolObject() local
148 assembler->GetBuffer()->EnsureSpaceFor(GetSize()); in EmitPoolObject()
149 assembler->GetBuffer()->EmitData(GetDataAddress(), GetSize()); in EmitPoolObject()
|
| /external/mesa3d/src/amd/compiler/tests/ |
| D | test_assembler.cpp | 28 BEGIN_TEST(assembler.s_memtime)
43 BEGIN_TEST(assembler.branch_3f)
62 BEGIN_TEST(assembler.long_jump.unconditional_forwards)
92 BEGIN_TEST(assembler.long_jump.conditional_forwards)
125 BEGIN_TEST(assembler.long_jump.unconditional_backwards)
153 BEGIN_TEST(assembler.long_jump.conditional_backwards)
182 BEGIN_TEST(assembler.long_jump.3f)
207 BEGIN_TEST(assembler.long_jump.constaddr)
231 BEGIN_TEST(assembler.v_add3)
249 BEGIN_TEST(assembler.v_add3_clamp)
|
| /external/libopus/m4/ |
| D | as-gcc-inline-assembly.m4 | 36 AC_MSG_CHECKING([if assembler supports NEON instructions on ARM])
47 AC_MSG_CHECKING([if assembler supports NEON instructions on ARM])
58 AC_MSG_CHECKING([if assembler supports ARMv6 media instructions on ARM])
69 AC_MSG_CHECKING([if assembler supports ARMv6 media instructions on ARM])
80 AC_MSG_CHECKING([if assembler supports EDSP instructions on ARM])
91 AC_MSG_CHECKING([if assembler supports EDSP instructions on ARM])
|
| /external/llvm/test/MC/ARM/ |
| D | eh-directive-setfp.s | 43 @ The assembler should emit 0x9B to copy stack pointer from r11.
85 @ The assembler should emit 0x9B to copy stack pointer from r11.
86 @ The assembler should emit ((-offset - 4) >> 2) for offset.
128 @ The assembler should emit 0x9B to copy stack pointer from r11.
129 @ The assembler should emit 0x3F and ((-offset - 0x104) >> 2) for offset.
171 @ The assembler should emit 0x9B to copy stack pointer from r11.
172 @ The assembler should emit 0xB2 and the ULEB128 encoding of
229 @ The assembler should emit 0x9B to copy stack pointer from r11.
230 @ The assembler should emit (0x40 | (offset - 4)) >> 2 for offset.
|
| D | eh-directive-pad.s | 36 @ The assembler should emit nothing (will be filled up with finish opcode).
78 @ The assembler should emit ((offset - 4) >> 2).
119 @ The assembler should emit 0x3F and ((offset - 0x104) >> 2).
161 @ The assembler should emit 0xB2 and the ULEB128 encoding of
217 @ The assembler should emit (0x40 | (-offset - 4)) >> 2. When (-offset - 4)
|
| D | eh-directive-save.s | 15 @ by 0xA0 or 0xA8, then the assembler should prefer them over 0x8000.
90 @ The assembler should emit 0xB000 unwind opcode.
147 @ The assembler should emit 0xA0 unwind opcode.
203 @ The assembler should emit 0xA8 unwind opcode.
289 @ The assembler should emit 0x8000 unwind opcode.
|
| /external/vixl/src/ |
| D | code-generation-scopes-vixl.h | 67 CodeBufferCheckScope(internal::AssemblerBase* assembler,
72 Open(assembler, size, check_policy, size_policy); in assembler_()
85 void Open(internal::AssemblerBase* assembler,
90 VIXL_ASSERT(assembler != NULL);
91 assembler_ = assembler;
93 assembler->GetBuffer()->EnsureSpaceFor(size);
|
| /external/vixl/doc/aarch64/ |
| D | getting-started-aarch64.md | 6 how to set up the VIXL assembler and generate some code. We will also go into
14 Creating the macro assembler and the simulator.
17 First of all you need to make sure that the header files for the assembler and
22 #include "aarch64/macro-assembler-aarch64.h"
29 Creating a macro assembler is as simple as
33 VIXL's assembler will generate some code at run-time, and this code needs to
34 be stored in a buffer. By default the assembler will automatically manage
49 We are now ready to generate some code. The macro assembler provides methods
50 for all the instructions that you can use. As it's a macro assembler,
56 optionally shifted by 12, but the macro assembler can generate one or more
[all …]
|
| /external/vixl/doc/aarch32/ |
| D | getting-started-aarch32.md | 6 how to set up the VIXL assembler and generate some code. We will also go into
14 Creating the macro assembler.
17 First of all you need to make sure that the header files for the assembler are
30 #include "aarch32/macro-assembler-aarch32.h"
42 First of all we need to create a macro assembler object.
50 We are now ready to generate some code. The macro assembler provides methods
51 for all the instructions that you can use. As it's a macro assembler,
96 VIXL's assembler provides a mechanism to represent labels with `Label` objects.
101 to a location using the macro assembler.
139 big. However, VIXL's macro assembler will automatically rewrite this line into
[all …]
|
| /external/swiftshader/third_party/subzero/docs/ |
| D | ALLOCATION.rst | 18 The result is a queue of assembler buffers, each of which consists of machine code
21 A single thread is responsible for writing the assembler buffers to an ELF file.
22 It consumes the assembler buffers from the queue that the translation threads
27 operands), and assembler buffers are created by the translation thread and
40 multithreaded, FIFO order for the assembler buffer queue may not be
43 assembler buffers are available.
49 emitted after all assembler buffers have been written. The writer needs to be
77 Even though there is a one-to-one correspondence between Cfgs and assembler
81 Ownership of the assembler buffer and its allocator are transferred to the
102 there is a slab allocator for the assembler buffer, a pointer to it can also be
[all …]
|
| /external/llvm/docs/ |
| D | AMDGPUUsage.rst | 38 The assembler is currently considered experimental.
106 The assembler will automatically detect which encoding size to use for
126 object that will be generated by the assembler. This value will be stored
138 If no arguments are specified, then the assembler will derive the ISA version,
140 assembler.
149 to specify the amd_kernel_code_t object that will be emitted by the assembler.
158 that is passed to the assembler.
|
| /external/python/cpython2/Modules/_ctypes/libffi/ |
| D | fficonfig.h.in | 42 /* Define if your assembler supports .ascii. */
45 /* Define if your assembler supports .cfi_* directives. */
48 /* Define if your assembler supports .register. */
51 /* Define if your assembler and linker support unaligned PC relative relocs.
55 /* Define if your assembler supports .string. */
58 /* Define if your assembler supports unwind section type. */
61 /* Define if your assembler supports PC relative relocs. */
|
| D | configure.ac | 372 AC_CACHE_CHECK([assembler and linker support unaligned pc related relocs],
385 [Define if your assembler and linker support unaligned PC relative relocs.])
388 AC_CACHE_CHECK([assembler .register pseudo-op support],
398 [Define if your assembler supports .register.])
403 AC_CACHE_CHECK([assembler supports pc related relocs],
413 [Define if your assembler supports PC relative relocs.])
416 AC_CACHE_CHECK([assembler .ascii pseudo-op support],
426 [Define if your assembler supports .ascii.])
429 AC_CACHE_CHECK([assembler .string pseudo-op support],
439 [Define if your assembler supports .string.])
[all …]
|
| /external/python/cpython2/Modules/_ctypes/libffi/m4/ |
| D | asmcfi.m4 | 2 [AC_CACHE_CHECK([assembler .cfi pseudo-op support],
11 [Define if your assembler supports .cfi_* directives.])
|
| /external/libffi/m4/ |
| D | asmcfi.m4 | 2 [AC_CACHE_CHECK([assembler .cfi pseudo-op support],
11 [Define if your assembler supports .cfi_* directives.])
|
| /external/llvm/test/MC/AsmParser/ |
| D | undefined-local-symbol.s | 4 # of what an assembler local symbol looks like (i.e., 'L' prefix.)
6 # CHECK: error: assembler local symbol 'Lbar' not defined
|
| /external/tensorflow/tensorflow/tools/dockerfiles/ |
| D | README.md | 8 maintained by `assembler.py`, which builds Dockerfiles from the files in
64 `assembler.py` to re-generate the full Dockerfiles before creating a pull
71 # Build the tools-helper image so you can run the assembler
83 …run --rm -v $(pwd):/tf -v /var/run/docker.sock:/var/run/docker.sock tf-tools python3 assembler.py "
86 …asm_dockerfiles="docker run --rm -u $(id -u):$(id -g) -v $(pwd):/tf tf-tools python3 assembler.py "
88 # Check assembler flags
|
| /external/llvm/test/MC/Mips/ |
| D | mips-noat.s | 3 # Check that using the assembler temporary when .set noat is in effect is an error.
5 # We start with the assembler temporary enabled
|
| /external/python/cpython2/Demo/threads/ |
| D | squasher.py | 75 def assembler(): function
98 coassembler = co.create(assembler)
|
| /external/vixl/test/aarch32/config/ |
| D | template-macro-assembler-aarch32.cc.in | 42 #include "aarch32/assembler-aarch32.h"
44 #include "aarch32/macro-assembler-aarch32.h"
64 // Values to be passed to the assembler to produce the instruction under test.
72 // The `operands` field represents what to pass to the assembler to
128 // Values to pass to the macro-assembler.
|
| D | template-assembler-negative-aarch32.cc.in | 40 #include "aarch32/macro-assembler-aarch32.h"
60 // Values to be passed to the assembler to produce the instruction under test.
68 // The `operands` field represents what to pass to the assembler to
90 // Values to pass to the assembler.
|
| /external/python/bumble/bumble/ |
| D | helpers.py | 106 assembler = self.avdtp_assemblers.get(l2cap_pdu.cid)
107 if assembler:
108 assembler.on_pdu(l2cap_pdu.payload)
|
| /external/angle/third_party/vulkan-deps/spirv-tools/src/docs/ |
| D | syntax.md | 30 but the assembler does not enforce this rule.
74 For every ID in the assembly program, the assembler generates a unique number
99 The assembler and disassembler support floating point literals in both
120 The assembler preserves all the bits of a NaN value. For example, the encoding
150 `!<integer>` values, and the assembler will still assemble an output binary with
154 You may wonder how the assembler recognizes the instruction structure (including
158 feature is intended for fine-grain control in SPIR-V testing), the assembler
175 The assembler processes the tokens encountered in alternate parsing mode as
187 * Any other token causes the assembler to quit with an error.
|
| /external/swiftshader/third_party/SPIRV-Tools/docs/ |
| D | syntax.md | 30 but the assembler does not enforce this rule.
74 For every ID in the assembly program, the assembler generates a unique number
99 The assembler and disassembler support floating point literals in both
120 The assembler preserves all the bits of a NaN value. For example, the encoding
150 `!<integer>` values, and the assembler will still assemble an output binary with
154 You may wonder how the assembler recognizes the instruction structure (including
158 feature is intended for fine-grain control in SPIR-V testing), the assembler
175 The assembler processes the tokens encountered in alternate parsing mode as
187 * Any other token causes the assembler to quit with an error.
|
| /external/deqp-deps/SPIRV-Tools/docs/ |
| D | syntax.md | 30 but the assembler does not enforce this rule.
74 For every ID in the assembly program, the assembler generates a unique number
99 The assembler and disassembler support floating point literals in both
120 The assembler preserves all the bits of a NaN value. For example, the encoding
150 `!<integer>` values, and the assembler will still assemble an output binary with
154 You may wonder how the assembler recognizes the instruction structure (including
158 feature is intended for fine-grain control in SPIR-V testing), the assembler
175 The assembler processes the tokens encountered in alternate parsing mode as
187 * Any other token causes the assembler to quit with an error.
|