| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86EvexToVex.cpp | 159 MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
174 MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
196 const MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
|
| D | X86FixupBWInsts.cpp | 311 assert(MI->getNumExplicitOperands() == 2); in tryReplaceCopy()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 447 for (unsigned I = getNumExplicitOperands(), E = getNumOperands();
458 return getNumOperands() - getNumExplicitOperands();
477 unsigned getNumExplicitOperands() const;
500 operands_begin() + getNumExplicitOperands());
504 operands_begin() + getNumExplicitOperands());
534 operands_begin() + getNumExplicitOperands());
538 operands_begin() + getNumExplicitOperands());
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 302 unsigned getNumExplicitOperands() const;
322 operands_begin() + getNumExplicitOperands());
326 operands_begin() + getNumExplicitOperands());
358 operands_begin() + getNumExplicitOperands() );
362 operands_begin() + getNumExplicitOperands() );
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFixIrreducibleControlFlow.cpp | 207 unsigned Index = MIB.getInstr()->getNumExplicitOperands() - 1; in VisitLoop()
260 ->getOperand(MIB.getInstr()->getNumExplicitOperands() - 1) in VisitLoop()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyCallIndirectFixup.cpp | 131 MI.operands_begin() + MI.getNumExplicitOperands())) in runOnMachineFunction()
|
| D | WebAssemblyFixIrreducibleControlFlow.cpp | 372 unsigned Index = MIB.getInstr()->getNumExplicitOperands() - 1; in makeSingleEntryLoop()
468 ->getOperand(MIB.getInstr()->getNumExplicitOperands() - 1) in makeSingleEntryLoop()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIWholeQuadMode.cpp | 544 if (MI.getNumExplicitOperands() >= 1) { in requiresCorrectState()
857 assert(MI->getNumExplicitOperands() == 2); in lowerCopyInstrs()
878 assert(MI->getNumExplicitOperands() == 3); in lowerCopyInstrs()
886 assert(MI->getNumExplicitOperands() == 2); in lowerCopyInstrs()
|
| D | SILowerControlFlow.cpp | 476 assert(MI.getNumExplicitOperands() == 3); in combineMasks()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 272 FirstOpNum = MI->getNumExplicitOperands() - 2; in adjustCCMasksForInstr()
325 return Compare.getNumExplicitOperands() == 2 && in isCompareZero()
|
| D | SystemZInstrInfo.cpp | 437 if (MI.getNumExplicitOperands() == 2 && MI.getOperand(0).isReg() && in analyzeCompare()
1005 unsigned NumOps = MI.getNumExplicitOperands(); in foldMemoryOperandImpl()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FixupBWInsts.cpp | 241 assert(MI->getNumExplicitOperands() == 2); in tryReplaceCopy()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 439 FirstOpNum = CCUserMI->getNumExplicitOperands() - 2; in adjustCCMasksForInstr()
511 return Compare.getNumExplicitOperands() == 2 && in isCompareZero()
|
| D | SystemZInstrInfo.cpp | 521 if (MI.getNumExplicitOperands() == 2 && MI.getOperand(0).isReg() && in analyzeCompare()
1163 unsigned NumOps = MI.getNumExplicitOperands(); in foldMemoryOperandImpl()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.cpp | 428 int NumOp = MI.getNumExplicitOperands(); in getBranchDestBlock()
571 if (LdSt.getNumExplicitOperands() != 3) in getMemOperandWithOffsetWidth()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CondBrTuning.cpp | 91 for (unsigned I = MI.getNumExplicitOperands(), E = MI.getNumOperands(); in convertToFlagSetting()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 75 int NumOp = Inst->getNumExplicitOperands(); in AnalyzeCondBr()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCBranchCoalescing.cpp | 263 if (I.getNumOperands() != I.getNumExplicitOperands()) { in canCoalesceBranch()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIWholeQuadMode.cpp | 394 if (MI.getNumExplicitOperands() >= 1) { in processBlock()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | Utils.cpp | 121 for (unsigned OpI = 0, OpE = I.getNumExplicitOperands(); OpI != OpE; ++OpI) { in constrainSelectedInstRegOperands()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 294 for (unsigned I = 1; I < MI->getNumExplicitOperands(); ++I) { in optimizeSDPattern()
|
| /external/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 302 for (unsigned I = 1; I < MI->getNumExplicitOperands(); ++I) { in optimizeSDPattern()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 83 int NumOp = Inst->getNumExplicitOperands(); in AnalyzeCondBr()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1577 if (LdSt.getNumExplicitOperands() == 3) { in getMemOpBaseRegImmOfsWidth()
1581 } else if (LdSt.getNumExplicitOperands() == 4) { in getMemOpBaseRegImmOfsWidth()
1693 if (LdSt.getNumExplicitOperands() == 3) { in getMemOpBaseRegImmOfsWidth()
1697 assert(LdSt.getNumExplicitOperands() == 4 && "invalid number of operands"); in getMemOpBaseRegImmOfsWidth()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 699 unsigned MachineInstr::getNumExplicitOperands() const { in getNumExplicitOperands() function in MachineInstr
1429 if (isVariadic() || OpIdx >= getNumExplicitOperands()) in getTypeToPrint()
|