Searched refs:getOpcodeDef (Results 1 – 6 of 6) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | Utils.h | 138 MachineInstr *getOpcodeDef(unsigned Opcode, Register Reg,
|
| D | LegalizationArtifactCombiner.h | 203 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, in tryFoldImplicitDef()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 663 MachineInstr *AddrDef = getOpcodeDef(TargetOpcode::G_PTR_ADD, Addr, MRI); in findPreIndexCandidate()
977 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemset()
1092 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemcpy()
1200 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemmove()
|
| D | Utils.cpp | 319 llvm::MachineInstr *llvm::getOpcodeDef(unsigned Opcode, Register Reg, in getOpcodeDef() function in llvm
|
| D | LegalizerHelper.cpp | 3202 getOpcodeDef(TargetOpcode::G_CONSTANT, Amt, MRI)) { in narrowScalarShift()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 2181 auto *LoadMI = getOpcodeDef(TargetOpcode::G_LOAD, SrcReg, MRI); in select()
3685 getOpcodeDef(G_INSERT_VECTOR_ELT, I.getOperand(1).getReg(), MRI); in tryOptVectorDup()
3690 getOpcodeDef(G_IMPLICIT_DEF, InsMI->getOperand(1).getReg(), MRI); in tryOptVectorDup()
4410 getOpcodeDef(TargetOpcode::G_PTR_ADD, Root.getReg(), MRI); in selectAddrModeShiftedExtendXReg()
4496 getOpcodeDef(TargetOpcode::G_PTR_ADD, Root.getReg(), MRI); in selectAddrModeWRO()
|