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/external/pdfium/core/fxcodec/jbig2/
DJBig2_Image.cpp320 uint32_t tmp2 = JBIG2_GETDWORD(lineDst); in ComposeToInternal() local
324 tmp = (tmp2 & ~maskM) | ((tmp1 | tmp2) & maskM); in ComposeToInternal()
327 tmp = (tmp2 & ~maskM) | ((tmp1 & tmp2) & maskM); in ComposeToInternal()
330 tmp = (tmp2 & ~maskM) | ((tmp1 ^ tmp2) & maskM); in ComposeToInternal()
333 tmp = (tmp2 & ~maskM) | ((~(tmp1 ^ tmp2)) & maskM); in ComposeToInternal()
336 tmp = (tmp2 & ~maskM) | (tmp1 & maskM); in ComposeToInternal()
349 uint32_t tmp2 = JBIG2_GETDWORD(lineDst); in ComposeToInternal() local
353 tmp = (tmp2 & ~maskM) | ((tmp1 | tmp2) & maskM); in ComposeToInternal()
356 tmp = (tmp2 & ~maskM) | ((tmp1 & tmp2) & maskM); in ComposeToInternal()
359 tmp = (tmp2 & ~maskM) | ((tmp1 ^ tmp2) & maskM); in ComposeToInternal()
[all …]
/external/arm-optimized-routines/string/aarch64/
Dstrcpy.S35 #define tmp2 x9 macro
95 and tmp2, srcin, #(MIN_PAGE_SIZE - 1)
98 cmp tmp2, #(MIN_PAGE_SIZE - 16)
114 rev tmp2, data1
115 sub tmp1, tmp2, zeroones
116 orr tmp2, tmp2, #REP8_7f
117 bics has_nul1, tmp1, tmp2
124 orr tmp2, data1, #REP8_7f
125 bics has_nul1, tmp1, tmp2
139 mov tmp2, #56
[all …]
/external/llvm/test/CodeGen/ARM/
Dvshift.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
8 %tmp3 = shl <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
17 %tmp3 = shl <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
26 %tmp3 = shl <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>, <1 x i64>* %B
35 %tmp3 = shl <1 x i64> %tmp1, %tmp2
43 %tmp2 = shl <8 x i8> %tmp1, < i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7 >
44 ret <8 x i8> %tmp2
[all …]
Dvbits.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
8 %tmp3 = and <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
17 %tmp3 = and <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
26 %tmp3 = and <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>, <1 x i64>* %B
35 %tmp3 = and <1 x i64> %tmp1, %tmp2
43 %tmp2 = load <16 x i8>, <16 x i8>* %B
44 %tmp3 = and <16 x i8> %tmp1, %tmp2
[all …]
Dvcnt.ll8 %tmp2 = call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> %tmp1)
9 ret <8 x i8> %tmp2
16 %tmp2 = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %tmp1)
17 ret <16 x i8> %tmp2
27 %tmp2 = call <8 x i8> @llvm.ctlz.v8i8(<8 x i8> %tmp1, i1 0)
28 ret <8 x i8> %tmp2
35 %tmp2 = call <4 x i16> @llvm.ctlz.v4i16(<4 x i16> %tmp1, i1 0)
36 ret <4 x i16> %tmp2
43 %tmp2 = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %tmp1, i1 0)
44 ret <2 x i32> %tmp2
[all …]
Dvneg.ll7 %tmp2 = sub <8 x i8> zeroinitializer, %tmp1
8 ret <8 x i8> %tmp2
15 %tmp2 = sub <4 x i16> zeroinitializer, %tmp1
16 ret <4 x i16> %tmp2
23 %tmp2 = sub <2 x i32> zeroinitializer, %tmp1
24 ret <2 x i32> %tmp2
31 %tmp2 = fsub <2 x float> < float -0.000000e+00, float -0.000000e+00 >, %tmp1
32 ret <2 x float> %tmp2
39 %tmp2 = sub <16 x i8> zeroinitializer, %tmp1
40 ret <16 x i8> %tmp2
[all …]
Dvshl.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
26 %tmp3 = call <2 x i32> @llvm.arm.neon.vshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
34 %tmp2 = load <1 x i64>, <1 x i64>* %B
35 %tmp3 = call <1 x i64> @llvm.arm.neon.vshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
43 %tmp2 = load <8 x i8>, <8 x i8>* %B
44 %tmp3 = call <8 x i8> @llvm.arm.neon.vshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
[all …]
Dvqshl.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vqshifts.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vqshifts.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
26 %tmp3 = call <2 x i32> @llvm.arm.neon.vqshifts.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
34 %tmp2 = load <1 x i64>, <1 x i64>* %B
35 %tmp3 = call <1 x i64> @llvm.arm.neon.vqshifts.v1i64(<1 x i64> %tmp1, <1 x i64> %tmp2)
43 %tmp2 = load <8 x i8>, <8 x i8>* %B
44 %tmp3 = call <8 x i8> @llvm.arm.neon.vqshiftu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
[all …]
Dvrev.ll7 …%tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3…
8 ret <8 x i8> %tmp2
15 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
16 ret <4 x i16> %tmp2
23 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> <i32 1, i32 0>
24 ret <2 x i32> %tmp2
31 %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> <i32 1, i32 0>
32 ret <2 x float> %tmp2
39 …%tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i3…
40 ret <16 x i8> %tmp2
[all …]
Dvadd.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
8 %tmp3 = add <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
17 %tmp3 = add <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
26 %tmp3 = add <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>, <1 x i64>* %B
35 %tmp3 = add <1 x i64> %tmp1, %tmp2
43 %tmp2 = load <2 x float>, <2 x float>* %B
44 %tmp3 = fadd <2 x float> %tmp1, %tmp2
[all …]
Dvsub.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
8 %tmp3 = sub <8 x i8> %tmp1, %tmp2
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
17 %tmp3 = sub <4 x i16> %tmp1, %tmp2
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
26 %tmp3 = sub <2 x i32> %tmp1, %tmp2
34 %tmp2 = load <1 x i64>, <1 x i64>* %B
35 %tmp3 = sub <1 x i64> %tmp1, %tmp2
43 %tmp2 = load <2 x float>, <2 x float>* %B
44 %tmp3 = fsub <2 x float> %tmp1, %tmp2
[all …]
Dvldlane.ll11 %tmp2 = load i8, i8* %A, align 8
12 %tmp3 = insertelement <8 x i8> %tmp1, i8 %tmp2, i32 3
21 %tmp2 = load i16, i16* %A, align 8
22 %tmp3 = insertelement <4 x i16> %tmp1, i16 %tmp2, i32 2
31 %tmp2 = load i32, i32* %A, align 8
32 %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1
41 %tmp2 = load i32, i32* %A, align 4
42 %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1
50 %tmp2 = load float, float* %A, align 4
51 %tmp3 = insertelement <2 x float> %tmp1, float %tmp2, i32 1
[all …]
Dpopcnt.ll8 %tmp2 = call <8 x i8> @llvm.ctpop.v8i8(<8 x i8> %tmp1)
9 ret <8 x i8> %tmp2
16 %tmp2 = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %tmp1)
17 ret <16 x i8> %tmp2
28 %tmp2 = call <4 x i16> @llvm.ctpop.v4i16(<4 x i16> %tmp1)
29 ret <4 x i16> %tmp2
40 %tmp2 = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %tmp1)
41 ret <8 x i16> %tmp2
55 %tmp2 = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %tmp1)
56 ret <2 x i32> %tmp2
[all …]
Dvcvt.ll7 %tmp2 = fptosi <2 x float> %tmp1 to <2 x i32>
8 ret <2 x i32> %tmp2
15 %tmp2 = fptoui <2 x float> %tmp1 to <2 x i32>
16 ret <2 x i32> %tmp2
23 %tmp2 = sitofp <2 x i32> %tmp1 to <2 x float>
24 ret <2 x float> %tmp2
31 %tmp2 = uitofp <2 x i32> %tmp1 to <2 x float>
32 ret <2 x float> %tmp2
39 %tmp2 = fptosi <4 x float> %tmp1 to <4 x i32>
40 ret <4 x i32> %tmp2
[all …]
Dvget_lane.ll9 %tmp2 = extractelement <8 x i8> %tmp1, i32 1
10 %tmp3 = sext i8 %tmp2 to i32
18 %tmp2 = extractelement <4 x i16> %tmp1, i32 1
19 %tmp3 = sext i16 %tmp2 to i32
27 %tmp2 = extractelement <8 x i8> %tmp1, i32 1
28 %tmp3 = zext i8 %tmp2 to i32
36 %tmp2 = extractelement <4 x i16> %tmp1, i32 1
37 %tmp3 = zext i16 %tmp2 to i32
46 %tmp2 = add <2 x i32> %tmp1, %tmp1
47 %tmp3 = extractelement <2 x i32> %tmp2, i32 1
[all …]
Dvcvt-v8.ll6 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %tmp1)
7 ret <4 x i32> %tmp2
14 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %tmp1)
15 ret <2 x i32> %tmp2
22 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %tmp1)
23 ret <4 x i32> %tmp2
30 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %tmp1)
31 ret <2 x i32> %tmp2
38 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %tmp1)
39 ret <4 x i32> %tmp2
[all …]
Dvabs.ll7 %tmp2 = call <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8> %tmp1)
8 ret <8 x i8> %tmp2
15 %tmp2 = call <4 x i16> @llvm.arm.neon.vabs.v4i16(<4 x i16> %tmp1)
16 ret <4 x i16> %tmp2
23 %tmp2 = call <2 x i32> @llvm.arm.neon.vabs.v2i32(<2 x i32> %tmp1)
24 ret <2 x i32> %tmp2
31 %tmp2 = call <2 x float> @llvm.fabs.v2f32(<2 x float> %tmp1)
32 ret <2 x float> %tmp2
39 %tmp2 = call <16 x i8> @llvm.arm.neon.vabs.v16i8(<16 x i8> %tmp1)
40 ret <16 x i8> %tmp2
[all …]
/external/webrtc/modules/audio_coding/codecs/isac/fix/source/
Dlpc_masking_model_mips.c36 int32_t tmp2, tmp3; in WebRtcIsacfix_CalculateResidualEnergyMIPS() local
55 : [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3), [tmp32] "=&r" (tmp32), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
71 : [tmp2] "r" (tmp2), [tmp3] "r" (tmp3) in WebRtcIsacfix_CalculateResidualEnergyMIPS()
75 if (((!(sign_1 || sign_2)) && (0x7FFFFFFF - sum64_hi < tmp2)) || in WebRtcIsacfix_CalculateResidualEnergyMIPS()
76 ((sign_1 && sign_2) && (sum64_hi + tmp2 > 0))) { in WebRtcIsacfix_CalculateResidualEnergyMIPS()
89 : [tmp2] "+r" (tmp2), [tmp3] "+r" (tmp3), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
103 : [tmp2] "r" (tmp2), [tmp3] "r" (tmp3) in WebRtcIsacfix_CalculateResidualEnergyMIPS()
119 int32_t tmp2, tmp3; in WebRtcIsacfix_CalculateResidualEnergyMIPS() local
141 : [tmp2] "=&r" (tmp2), [tmp3] "=&r" (tmp3), [tmp32] "=&r" (tmp32), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
156 : [tmp2] "+r" (tmp2), [tmp3] "+r" (tmp3), [sum64_hi] "+r" (sum64_hi), in WebRtcIsacfix_CalculateResidualEnergyMIPS()
[all …]
/external/libiio/src/
Dsort.c41 const struct iio_channel *tmp2 = *(struct iio_channel **)p2; in iio_channel_compare() local
44 if (iio_channel_is_scan_element(tmp1) && !iio_channel_is_scan_element(tmp2)) in iio_channel_compare()
46 if (!iio_channel_is_scan_element(tmp1) && iio_channel_is_scan_element(tmp2)) in iio_channel_compare()
49 if (iio_channel_is_scan_element(tmp1) && iio_channel_is_scan_element(tmp2)){ in iio_channel_compare()
50 if (iio_channel_get_index(tmp1) > iio_channel_get_index(tmp2)) in iio_channel_compare()
55 if (strcmp(tmp1->id, tmp2->id) == 0) in iio_channel_compare()
59 return strcmp(tmp1->id, tmp2->id); in iio_channel_compare()
65 const struct iio_channel_attr *tmp2 = (struct iio_channel_attr *)p2; in iio_channel_attr_compare() local
67 return strcmp(tmp1->name, tmp2->name); in iio_channel_attr_compare()
73 const struct iio_device *tmp2 = *(struct iio_device **)p2; in iio_device_compare() local
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-scalar-by-elem-mul.ll7 %tmp2 = fmul float %a, %tmp1;
8 ret float %tmp2;
15 %tmp2 = fmul float %tmp1, %a;
16 ret float %tmp2;
24 %tmp2 = fmul float %a, %tmp1;
25 ret float %tmp2;
32 %tmp2 = fmul float %tmp1, %a;
33 ret float %tmp2;
41 %tmp2 = fmul double %a, %tmp1;
42 ret double %tmp2;
[all …]
Dneon-mla-mls.ll7 %tmp2 = add <8 x i8> %C, %tmp1;
8 ret <8 x i8> %tmp2
14 %tmp2 = add <16 x i8> %C, %tmp1;
15 ret <16 x i8> %tmp2
21 %tmp2 = add <4 x i16> %C, %tmp1;
22 ret <4 x i16> %tmp2
28 %tmp2 = add <8 x i16> %C, %tmp1;
29 ret <8 x i16> %tmp2
35 %tmp2 = add <2 x i32> %C, %tmp1;
36 ret <2 x i32> %tmp2
[all …]
Darm64-mul.ll12 %tmp2 = zext i64 %b to i128
13 %tmp3 = mul i128 %tmp1, %tmp2
23 %tmp2 = sext i64 %b to i128
24 %tmp3 = mul i128 %tmp1, %tmp2
33 %tmp2 = zext i32 %b to i64
34 %tmp3 = mul i64 %tmp1, %tmp2
43 %tmp2 = sext i32 %b to i64
44 %tmp3 = mul i64 %tmp1, %tmp2
53 %tmp2 = zext i32 %b to i64
54 %tmp3 = mul i64 %tmp1, %tmp2
[all …]
/external/llvm/test/Transforms/Reassociate/
Dotherops.ll7 ; CHECK-NEXT: %tmp2 = mul i32 %arg, 144
8 ; CHECK-NEXT: ret i32 %tmp2
11 %tmp2 = mul i32 %tmp1, 12
12 ret i32 %tmp2
17 ; CHECK-NEXT: %tmp2 = and i32 %arg, 14
18 ; CHECK-NEXT: ret i32 %tmp2
21 %tmp2 = and i32 %tmp1, 14
22 ret i32 %tmp2
27 ; CHECK-NEXT: %tmp2 = or i32 %arg, 14
28 ; CHECK-NEXT: ret i32 %tmp2
[all …]
/external/arm-optimized-routines/string/arm/
Dmemcpy.S65 #define tmp2 r10 macro
212 str tmp2, [sp, #-FRAME_SIZE]!
213 and tmp2, src, #7
215 cmp tmp1, tmp2
228 lsls tmp2, dst, #29
230 rsbs tmp2, tmp2, #0
231 sub count, count, tmp2, lsr #29
234 lsls tmp2, tmp2, #2
236 ldrbne tmp2, [src], #1
238 strbne tmp2, [dst], #1
[all …]
/external/webrtc/common_audio/signal_processing/
Dresample_by_2_mips.c153 int32_t tmp1, tmp2, diff; in WebRtcSpl_DownsampleBy2() local
163 tmp2 = MUL_ACCUM_2(kResampleAllpass2[1], diff, state1); in WebRtcSpl_DownsampleBy2()
165 diff = tmp2 - state3; in WebRtcSpl_DownsampleBy2()
167 state2 = tmp2; in WebRtcSpl_DownsampleBy2()
175 tmp2 = MUL_ACCUM_1(kResampleAllpass1[1], diff, state5); in WebRtcSpl_DownsampleBy2()
177 diff = tmp2 - state7; in WebRtcSpl_DownsampleBy2()
179 state6 = tmp2; in WebRtcSpl_DownsampleBy2()
192 tmp2 = MUL_ACCUM_2(kResampleAllpass2[1], diff, state1); in WebRtcSpl_DownsampleBy2()
194 diff = tmp2 - state3; in WebRtcSpl_DownsampleBy2()
196 state2 = tmp2; in WebRtcSpl_DownsampleBy2()
[all …]

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