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/external/llvm/test/MC/SystemZ/
Dinsn-bad-zEC12.s92 #CHECK: vab %v0, %v0, %v0
94 #CHECK: vaf %v0, %v0, %v0
96 #CHECK: vag %v0, %v0, %v0
98 #CHECK: vah %v0, %v0, %v0
100 #CHECK: vaq %v0, %v0, %v0
102 vab %v0, %v0, %v0
103 vaf %v0, %v0, %v0
104 vag %v0, %v0, %v0
105 vah %v0, %v0, %v0
106 vaq %v0, %v0, %v0
[all …]
Dinsn-good-z13.s21 #CHECK: vab %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf3]
22 #CHECK: vab %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf3]
23 #CHECK: vab %v0, %v31, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x04,0xf3]
24 #CHECK: vab %v31, %v0, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x08,0xf3]
27 vab %v0, %v0, %v0
28 vab %v0, %v0, %v31
29 vab %v0, %v31, %v0
30 vab %v31, %v0, %v0
33 #CHECK: vaccb %v0, %v0, %v0 # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf1]
34 #CHECK: vaccb %v0, %v0, %v31 # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf1]
[all …]
Dinsn-bad-z13.s23 #CHECK: vcdgb %v0, %v0, 0, -1
25 #CHECK: vcdgb %v0, %v0, 0, 16
27 #CHECK: vcdgb %v0, %v0, -1, 0
29 #CHECK: vcdgb %v0, %v0, 16, 0
31 vcdgb %v0, %v0, 0, -1
32 vcdgb %v0, %v0, 0, 16
33 vcdgb %v0, %v0, -1, 0
34 vcdgb %v0, %v0, 16, 0
37 #CHECK: vcdlgb %v0, %v0, 0, -1
39 #CHECK: vcdlgb %v0, %v0, 0, 16
[all …]
/external/llvm/test/MC/AArch64/
Darm64-advsimd.s5 abs.8b v0, v0
6 abs.16b v0, v0
7 abs.4h v0, v0
8 abs.8h v0, v0
9 abs.2s v0, v0
10 abs.4s v0, v0
12 ; CHECK: abs.8b v0, v0 ; encoding: [0x00,0xb8,0x20,0x0e]
13 ; CHECK: abs.16b v0, v0 ; encoding: [0x00,0xb8,0x20,0x4e]
14 ; CHECK: abs.4h v0, v0 ; encoding: [0x00,0xb8,0x60,0x0e]
15 ; CHECK: abs.8h v0, v0 ; encoding: [0x00,0xb8,0x60,0x4e]
[all …]
Dneon-simd-shift.s8 sshr v0.8b, v1.8b, #3
9 sshr v0.4h, v1.4h, #3
10 sshr v0.2s, v1.2s, #3
11 sshr v0.16b, v1.16b, #3
12 sshr v0.8h, v1.8h, #3
13 sshr v0.4s, v1.4s, #3
14 sshr v0.2d, v1.2d, #3
26 ushr v0.8b, v1.8b, #3
27 ushr v0.4h, v1.4h, #3
28 ushr v0.2s, v1.2s, #3
[all …]
Dneon-3vdiff.s17 saddl v0.8h, v1.8b, v2.8b
18 saddl v0.4s, v1.4h, v2.4h
19 saddl v0.2d, v1.2s, v2.2s
25 saddl2 v0.4s, v1.8h, v2.8h
26 saddl2 v0.8h, v1.16b, v2.16b
27 saddl2 v0.2d, v1.4s, v2.4s
33 uaddl v0.8h, v1.8b, v2.8b
34 uaddl v0.4s, v1.4h, v2.4h
35 uaddl v0.2d, v1.2s, v2.2s
41 uaddl2 v0.8h, v1.16b, v2.16b
[all …]
Dneon-diagnostics.s9 add v0.16b, v1.8b, v2.8b
10 sub v0.2d, v1.2d, v2.2s
24 fadd v0.2d, v1.2s, v2.2s
25 fsub v0.4s, v1.2s, v2.4s
26 fsub v0.8b, v1.8b, v2.8b
43 mul v0.16b, v1.8b, v2.8b
44 mul v0.2d, v1.2d, v2.2d
57 fmul v0.16b, v1.8b, v2.8b
58 fdiv v0.2s, v1.2d, v2.2d
71 and v0.8b, v1.16b, v2.8b
[all …]
Dneon-2velem.s9 mla v0.2s, v1.2s, v2.s[2]
10 mla v0.2s, v1.2s, v22.s[2]
19 mla v0.4h, v1.4h, v2.h[2]
20 mla v0.4h, v1.4h, v15.h[2]
21 mla v0.8h, v1.8h, v2.h[7]
22 mla v0.8h, v1.8h, v14.h[6]
29 mls v0.2s, v1.2s, v2.s[2]
30 mls v0.2s, v1.2s, v22.s[2]
39 mls v0.4h, v1.4h, v2.h[2]
40 mls v0.4h, v1.4h, v15.h[2]
[all …]
Dfullfp16-neon-neg.s6 fabs.4h v0, v0
8 fneg.4h v0, v0
10 frecpe.4h v0, v0
12 frinta.4h v0, v0
14 frintx.4h v0, v0
16 frinti.4h v0, v0
18 frintm.4h v0, v0
20 frintn.4h v0, v0
22 frintp.4h v0, v0
24 frintz.4h v0, v0
[all …]
Dneon-simd-ldst-multi-elem.s8 st1 { v0.16b }, [x0]
11 st1 { v0.2d }, [x0]
12 st1 { v0.8b }, [x0]
15 st1 { v0.1d }, [x0]
28 st1 { v0.16b, v1.16b }, [x0]
30 st1 { v31.4s, v0.4s }, [sp]
31 st1 { v0.2d, v1.2d }, [x0]
32 st1 { v0.8b, v1.8b }, [x0]
34 st1 { v31.2s, v0.2s }, [sp]
35 st1 { v0.1d, v1.1d }, [x0]
[all …]
Dneon-mov.s9 movi v0.2s, #1
14 movi v0.4s, #1
15 movi v0.4s, #1, lsl #8
16 movi v0.4s, #1, lsl #16
17 movi v0.4s, #1, lsl #24
18 movi v0.4h, #1
19 movi v0.4h, #1, lsl #8
20 movi v0.8h, #1
21 movi v0.8h, #1, lsl #8
40 mvni v0.2s, #1
[all …]
Dneon-perm.s9 uzp1 v0.8b, v1.8b, v2.8b
10 uzp1 v0.16b, v1.16b, v2.16b
11 uzp1 v0.4h, v1.4h, v2.4h
12 uzp1 v0.8h, v1.8h, v2.8h
13 uzp1 v0.2s, v1.2s, v2.2s
14 uzp1 v0.4s, v1.4s, v2.4s
15 uzp1 v0.2d, v1.2d, v2.2d
25 trn1 v0.8b, v1.8b, v2.8b
26 trn1 v0.16b, v1.16b, v2.16b
27 trn1 v0.4h, v1.4h, v2.4h
[all …]
/external/smali/smali-integration-tests/src/test/smali/jumbo-string-tests/
DFormat31c.smali44 const-string/jumbo v0, "99999"
45 invoke-virtual {v0}, Ljava/lang/String;->length()I
52 invoke-virtual {v0, v2}, Ljava/lang/String;->charAt(I)C
70 const-string v0, "99999"
71 invoke-virtual {v0}, Ljava/lang/String;->length()I
78 invoke-virtual {v0, v2}, Ljava/lang/String;->charAt(I)C
95 const-string/jumbo v0, "0"
96 const-string/jumbo v0, "1"
97 const-string/jumbo v0, "2"
98 const-string/jumbo v0, "3"
[all …]
/external/capstone/suite/MC/AArch64/
Dneon-simd-shift.s.cs2 0x20,0x04,0x0d,0x0f = sshr v0.8b, v1.8b, #3
3 0x20,0x04,0x1d,0x0f = sshr v0.4h, v1.4h, #3
4 0x20,0x04,0x3d,0x0f = sshr v0.2s, v1.2s, #3
5 0x20,0x04,0x0d,0x4f = sshr v0.16b, v1.16b, #3
6 0x20,0x04,0x1d,0x4f = sshr v0.8h, v1.8h, #3
7 0x20,0x04,0x3d,0x4f = sshr v0.4s, v1.4s, #3
8 0x20,0x04,0x7d,0x4f = sshr v0.2d, v1.2d, #3
9 0x20,0x04,0x0d,0x2f = ushr v0.8b, v1.8b, #3
10 0x20,0x04,0x1d,0x2f = ushr v0.4h, v1.4h, #3
11 0x20,0x04,0x3d,0x2f = ushr v0.2s, v1.2s, #3
[all …]
Dneon-3vdiff.s.cs2 0x20,0x00,0x22,0x0e = saddl v0.8h, v1.8b, v2.8b
3 0x20,0x00,0x62,0x0e = saddl v0.4s, v1.4h, v2.4h
4 0x20,0x00,0xa2,0x0e = saddl v0.2d, v1.2s, v2.2s
5 0x20,0x00,0x62,0x4e = saddl2 v0.4s, v1.8h, v2.8h
6 0x20,0x00,0x22,0x4e = saddl2 v0.8h, v1.16b, v2.16b
7 0x20,0x00,0xa2,0x4e = saddl2 v0.2d, v1.4s, v2.4s
8 0x20,0x00,0x22,0x2e = uaddl v0.8h, v1.8b, v2.8b
9 0x20,0x00,0x62,0x2e = uaddl v0.4s, v1.4h, v2.4h
10 0x20,0x00,0xa2,0x2e = uaddl v0.2d, v1.2s, v2.2s
11 0x20,0x00,0x22,0x6e = uaddl2 v0.8h, v1.16b, v2.16b
[all …]
Dneon-2velem.s.cs2 0x20,0x08,0x82,0x2f = mla v0.2s, v1.2s, v2.s[2]
3 0x20,0x08,0x96,0x2f = mla v0.2s, v1.2s, v22.s[2]
6 0x20,0x00,0x62,0x2f = mla v0.4h, v1.4h, v2.h[2]
7 0x20,0x00,0x6f,0x2f = mla v0.4h, v1.4h, v15.h[2]
8 0x20,0x08,0x72,0x6f = mla v0.8h, v1.8h, v2.h[7]
9 0x20,0x08,0x6e,0x6f = mla v0.8h, v1.8h, v14.h[6]
10 0x20,0x48,0x82,0x2f = mls v0.2s, v1.2s, v2.s[2]
11 0x20,0x48,0x96,0x2f = mls v0.2s, v1.2s, v22.s[2]
14 0x20,0x40,0x62,0x2f = mls v0.4h, v1.4h, v2.h[2]
15 0x20,0x40,0x6f,0x2f = mls v0.4h, v1.4h, v15.h[2]
[all …]
Dneon-simd-ldst-multi-elem.s.cs2 0x00,0x70,0x00,0x4c = st1 {v0.16b}, [x0]
5 0x00,0x7c,0x00,0x4c = st1 {v0.2d}, [x0]
6 0x00,0x70,0x00,0x0c = st1 {v0.8b}, [x0]
9 0x00,0x7c,0x00,0x0c = st1 {v0.1d}, [x0]
10 0x00,0xa0,0x00,0x4c = st1 {v0.16b, v1.16b}, [x0]
12 0xff,0xab,0x00,0x4c = st1 {v31.4s, v0.4s}, [sp]
13 0x00,0xac,0x00,0x4c = st1 {v0.2d, v1.2d}, [x0]
14 0x00,0xa0,0x00,0x0c = st1 {v0.8b, v1.8b}, [x0]
16 0xff,0xab,0x00,0x0c = st1 {v31.2s, v0.2s}, [sp]
17 0x00,0xac,0x00,0x0c = st1 {v0.1d, v1.1d}, [x0]
[all …]
Dneon-mov.s.cs2 0x20,0x04,0x00,0x0f = movi v0.2s, #0x1
7 0x20,0x04,0x00,0x4f = movi v0.4s, #0x1
8 0x20,0x24,0x00,0x4f = movi v0.4s, #0x1, lsl #8
9 0x20,0x44,0x00,0x4f = movi v0.4s, #0x1, lsl #16
10 0x20,0x64,0x00,0x4f = movi v0.4s, #0x1, lsl #24
11 0x20,0x84,0x00,0x0f = movi v0.4h, #0x1
12 0x20,0xa4,0x00,0x0f = movi v0.4h, #0x1, lsl #8
13 0x20,0x84,0x00,0x4f = movi v0.8h, #0x1
14 0x20,0xa4,0x00,0x4f = movi v0.8h, #0x1, lsl #8
15 0x20,0x04,0x00,0x2f = mvni v0.2s, #0x1
[all …]
/external/zucchini/testdata/
Dall.smali57 aget v0, v1, v2
59 aget-wide v0, v1, v2
61 aget-object v0, v1, v2
63 aget-boolean v0, v1, v2
65 aget-byte v0, v1, v2
67 aget-char v0, v1, v2
69 aget-short v0, v1, v2
71 aput v0, v1, v2
73 aput-wide v0, v1, v2
75 aput-object v0, v1, v2
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt10 # CHECK: abs.8b v0, v0
11 # CHECK: abs.16b v0, v0
12 # CHECK: abs.4h v0, v0
13 # CHECK: abs.8h v0, v0
14 # CHECK: abs.2s v0, v0
15 # CHECK: abs.4s v0, v0
25 # CHECK: add.8b v0, v0, v0
26 # CHECK: add.16b v0, v0, v0
27 # CHECK: add.4h v0, v0, v0
28 # CHECK: add.8h v0, v0, v0
[all …]
/external/smali/smalidea/testData/fieldRename/fieldRename/after/
Dblah.smali14 iget v0, v0, Lblah;->blort:Lblah;
15 iget-object v0, v0, Lblah;->blort:Lblah;
16 iget-byte v0, v0, Lblah;->blort:Lblah;
17 iget-char v0, v0, Lblah;->blort:Lblah;
18 iget-object v0, v0, Lblah;->blort:Lblah;
19 iget-object-volatile v0, v0, Lblah;->blort:Lblah;
20 iget-short v0, v0, Lblah;->blort:Lblah;
21 iget-volatile v0, v0, Lblah;->blort:Lblah;
22 iget-wide v0, v0, Lblah;->blort:Lblah;
23 iget-wide-volatile v0, v0, Lblah;->blort:Lblah;
[all …]
/external/smali/smalidea/testData/fieldRename/fieldRename/before/
Dblah.smali14 iget v0, v0, Lblah;->blah:Lblah;
15 iget-object v0, v0, Lblah;->blah:Lblah;
16 iget-byte v0, v0, Lblah;->blah:Lblah;
17 iget-char v0, v0, Lblah;->blah:Lblah;
18 iget-object v0, v0, Lblah;->blah:Lblah;
19 iget-object-volatile v0, v0, Lblah;->blah:Lblah;
20 iget-short v0, v0, Lblah;->blah:Lblah;
21 iget-volatile v0, v0, Lblah;->blah:Lblah;
22 iget-wide v0, v0, Lblah;->blah:Lblah;
23 iget-wide-volatile v0, v0, Lblah;->blah:Lblah;
[all …]
/external/llvm/test/MC/AMDGPU/
Dvop_dpp.s12 v_mov_b32 v0, v0 quad_perm:[0,2,1,1]
16 v_mov_b32 v0, v0 row_shl:1
20 v_mov_b32 v0, v0 row_shr:0xf
24 v_mov_b32 v0, v0 row_ror:0xc
28 v_mov_b32 v0, v0 wave_shl:1
32 v_mov_b32 v0, v0 wave_rol:1
36 v_mov_b32 v0, v0 wave_shr:1
40 v_mov_b32 v0, v0 wave_ror:1
44 v_mov_b32 v0, v0 row_mirror
48 v_mov_b32 v0, v0 row_half_mirror
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-subvector-extend.ll9 define <8 x i16> @func1(<8 x i8> %v0) nounwind {
11 ; CHECK-NEXT: ushll.8h v0, v0, #0
13 %r = zext <8 x i8> %v0 to <8 x i16>
17 define <8 x i16> @func2(<8 x i8> %v0) nounwind {
19 ; CHECK-NEXT: sshll.8h v0, v0, #0
21 %r = sext <8 x i8> %v0 to <8 x i16>
25 define <16 x i16> @func3(<16 x i8> %v0) nounwind {
27 ; CHECK-NEXT: ushll2.8h v1, v0, #0
28 ; CHECK-NEXT: ushll.8h v0, v0, #0
30 %r = zext <16 x i8> %v0 to <16 x i16>
[all …]
/external/rust/crates/hashbrown/
DCHANGELOG.md10 ## [v0.11.2] - 2021-03-25
16 ## [v0.11.1] - 2021-03-20
22 ## [v0.11.0] - 2021-03-14
44 ## ~~[v0.10.0] - 2021-01-16~~
54 ## [v0.9.1] - 2020-09-28
68 ## [v0.9.0] - 2020-09-03
86 ## [v0.8.2] - 2020-08-08
92 ## [v0.8.1] - 2020-07-16
106 ## [v0.8.0] - 2020-06-18
121 ## [v0.7.2] - 2020-04-27
[all …]

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