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Searched refs:vsqrt (Results 1 – 25 of 35) sorted by relevance

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/external/XNNPACK/scripts/
Dgenerate-f32-vsqrt.sh8 tools/xngen src/f32-vsqrt/scalar-sqrt.c.in -D BATCH_TILE=1 -o src/f32-vsqrt/gen/scalar-sqrt-x1.c &
9 tools/xngen src/f32-vsqrt/scalar-sqrt.c.in -D BATCH_TILE=2 -o src/f32-vsqrt/gen/scalar-sqrt-x2.c &
10 tools/xngen src/f32-vsqrt/scalar-sqrt.c.in -D BATCH_TILE=4 -o src/f32-vsqrt/gen/scalar-sqrt-x4.c &
13 tools/xngen src/f32-vsqrt/wasmsimd-sqrt.c.in -D BATCH_TILE=4 -o src/f32-vsqrt/gen/wasmsimd-sqrt-x4.…
14 tools/xngen src/f32-vsqrt/wasmsimd-sqrt.c.in -D BATCH_TILE=8 -o src/f32-vsqrt/gen/wasmsimd-sqrt-x8.…
17 tools/xngen src/f32-vsqrt/neon-sqrt.c.in -D BATCH_TILE=4 -o src/f32-vsqrt/gen/neon-sqrt-x4.c &
18 tools/xngen src/f32-vsqrt/neon-sqrt.c.in -D BATCH_TILE=8 -o src/f32-vsqrt/gen/neon-sqrt-x8.c &
20 tools/xngen src/f32-vsqrt/neonfma-nr2fma1adj.c.in -D BATCH_TILE=4 -o src/f32-vsqrt/gen/neonfma-nr2…
21 tools/xngen src/f32-vsqrt/neonfma-nr2fma1adj.c.in -D BATCH_TILE=8 -o src/f32-vsqrt/gen/neonfma-nr2…
22 tools/xngen src/f32-vsqrt/neonfma-nr2fma1adj.c.in -D BATCH_TILE=12 -o src/f32-vsqrt/gen/neonfma-nr2…
[all …]
/external/ComputeLibrary/src/core/NEON/wrapper/intrinsics/
Dsqrt.h36 inline type vsqrt(const type &a) \
41 VSQRT_IMPL(float32x2_t, vsqrt, f32)
43 VSQRT_IMPL(float16x4_t, vsqrt, f16)
/external/llvm/test/MC/ARM/
Dsingle-precision-fp.s47 vsqrt.f64 d13, d12
48 vsqrt d13, d14
52 @ CHECK-ERRORS-NEXT: vsqrt.f64 d13, d12
54 @ CHECK-ERRORS-NEXT: vsqrt d13, d14
Dsimple-fp-encoding.s71 vsqrt.f64 d16, d16
72 vsqrt.f32 s0, s0
74 @ CHECK: vsqrt.f64 d16, d16 @ encoding: [0xe0,0x0b,0xf1,0xee]
75 @ CHECK: vsqrt.f32 s0, s0 @ encoding: [0xc0,0x0a,0xb1,0xee]
Dfullfp16.s64 vsqrt.f16 s0, s0
65 @ ARM: vsqrt.f16 s0, s0 @ encoding: [0xc0,0x09,0xb1,0xee]
66 @ THUMB: vsqrt.f16 s0, s0 @ encoding: [0xb1,0xee,0xc0,0x09]
Dfullfp16-neg.s49 vsqrt.f16 s0, s0
/external/llvm/test/CodeGen/ARM/
D2011-11-29-128bitArithmetics.ll12 ; CHECK: vsqrt.f32 {{s[0-9]+}}, {{s[0-9]+}}
13 ; CHECK: vsqrt.f32 {{s[0-9]+}}, {{s[0-9]+}}
14 ; CHECK: vsqrt.f32 {{s[0-9]+}}, {{s[0-9]+}}
15 ; CHECK: vsqrt.f32 {{s[0-9]+}}, {{s[0-9]+}}
Dfp16-promote.ll422 ; CHECK-FP16: vsqrt.f32
425 ; CHECK-VFP-LIBCALL: vsqrt.f32
/external/capstone/suite/MC/ARM/
Dsimple-fp-encoding.s.cs26 0xe0,0x0b,0xf1,0xee = vsqrt.f64 d16, d16
27 0xc0,0x0a,0xb1,0xee = vsqrt.f32 s0, s0
/external/XNNPACK/bench/
Df32-vsqrt.cc24 xnn_f32_vsqrt_ukernel_function vsqrt, in f32_vsqrt() argument
47 vsqrt(num_elements * sizeof(float), input.data(), output.data(), &params); in f32_vsqrt()
/external/llvm/test/MC/Disassembler/ARM/
Dfp-encoding.txt58 # CHECK: vsqrt.f64 d16, d16
61 # CHECK: vsqrt.f32 s0, s0
Dfullfp16-thumb.txt48 # CHECK: vsqrt.f16 s0, s0
Dfullfp16-arm.txt48 # CHECK: vsqrt.f16 s0, s0
/external/ComputeLibrary/src/core/NEON/kernels/activation/impl/
Dfp32_neon_activation.cpp126 tmp = wrapper::vsqrt(vin); in fp32_neon_activation()
Dfp16_neon_activation.cpp129 tmp = wrapper::vsqrt(vin); in fp16_neon_activation()
/external/XNNPACK/
DCMakeLists.txt381 src/f32-vsqrt/gen/scalar-sqrt-x1.c
525 src/f32-vsqrt/gen/scalar-sqrt-x1.c
961 src/f32-vsqrt/gen/scalar-sqrt-x1.c
962 src/f32-vsqrt/gen/scalar-sqrt-x2.c
963 src/f32-vsqrt/gen/scalar-sqrt-x4.c
2741 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c
2742 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c
2743 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c
2744 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c
2745 src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c
[all …]
DAndroid.bp200 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
333 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
476 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
913 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
914 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
915 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
2247 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
2248 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
3964 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
3965 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
[all …]
DBUILD.bazel216 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
349 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
492 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
929 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
930 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
931 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
2263 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
2264 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
3980 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
3981 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
[all …]
/external/XNNPACK/test/
Dvunary-microkernel-tester.h523 …void Test(xnn_f32_vsqrt_ukernel_function vsqrt, xnn_init_f32_sqrt_params_fn init_params = nullptr)…
552 … vsqrt(batch_size() * sizeof(float), x_data, y.data(), init_params != nullptr ? &params : nullptr);
/external/llvm/test/CodeGen/Thumb2/
Dfloat-intrinsics-float.ll12 ; HARD: vsqrt.f32 s0, s0
Dfloat-intrinsics-double.ll12 ; HARD: vsqrt.f64 d0, d0
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td948 IIC_fpSQRT64, "vsqrt", ".f64\t$Dd, $Dm",
953 IIC_fpSQRT32, "vsqrt", ".f32\t$Sd, $Sm",
958 IIC_fpSQRT16, "vsqrt", ".f16\t$Sd, $Sm",
2209 def : VFP2MnemonicAlias<"fsqrts", "vsqrt">;
2210 def : VFP2MnemonicAlias<"fsqrtd", "vsqrt">;
2262 def : VFP2InstAlias<"vsqrt${p} $Sd, $Sm", (VSQRTS SPR:$Sd, SPR:$Sm, pred:$p)>;
2263 def : VFP2DPInstAlias<"vsqrt${p} $Dd, $Dm", (VSQRTD DPR:$Dd, DPR:$Dm, pred:$p)>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td1025 IIC_fpSQRT64, "vsqrt", ".f64\t$Dd, $Dm",
1031 IIC_fpSQRT32, "vsqrt", ".f32\t$Sd, $Sm",
1037 IIC_fpSQRT16, "vsqrt", ".f16\t$Sd, $Sm",
2543 def : VFP2MnemonicAlias<"fsqrts", "vsqrt">;
2544 def : VFP2MnemonicAlias<"fsqrtd", "vsqrt">;
2596 def : VFP2InstAlias<"vsqrt${p} $Sd, $Sm", (VSQRTS SPR:$Sd, SPR:$Sm, pred:$p)>;
2597 def : VFP2DPInstAlias<"vsqrt${p} $Dd, $Dm", (VSQRTD DPR:$Dd, DPR:$Dm, pred:$p)>;
/external/vixl/src/aarch32/
Dassembler-aarch32.h5785 void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm);
5786 void vsqrt(DataType dt, SRegister rd, SRegister rm) { vsqrt(al, dt, rd, rm); } in vsqrt() function
5788 void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm);
5789 void vsqrt(DataType dt, DRegister rd, DRegister rm) { vsqrt(al, dt, rd, rm); } in vsqrt() function
Ddisasm-aarch32.h2474 void vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm);
2476 void vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm);

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