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Searched refs:interleaved (Results 1 – 6 of 6) sorted by relevance

/frameworks/rs/cpu_ref/
DrsCpuIntrinsics_neon_YuvToRGB.S87 .macro wrap_line kernel, interleaved=0, swapuv=0 argument
105 .if \interleaved
143 .if \interleaved
153 .if \interleaved
162 .if \interleaved
171 .if \interleaved
184 .if \interleaved
DrsCpuIntrinsics_advsimd_YuvToRGB.S152 .macro wrap_line kernel, interleaved=0, swapuv=0 argument
174 .if \interleaved
211 .if \interleaved
219 .if \interleaved
227 .if \interleaved
235 .if \interleaved
243 .if \interleaved
258 .if \interleaved
/frameworks/rs/toolkit/
DYuvToRgb_neon.S87 .macro wrap_line kernel, interleaved=0, swapuv=0 argument
105 .if \interleaved
143 .if \interleaved
153 .if \interleaved
162 .if \interleaved
171 .if \interleaved
184 .if \interleaved
DYuvToRgb_advsimd.S152 .macro wrap_line kernel, interleaved=0, swapuv=0 argument
174 .if \interleaved
211 .if \interleaved
219 .if \interleaved
227 .if \interleaved
235 .if \interleaved
243 .if \interleaved
258 .if \interleaved
/frameworks/base/
DOWNERS.md8 it's evolved into a complex interleaved structure over the years. Because of
/frameworks/base/packages/SystemUI/docs/
Dexecutors.md300 One gotcha of direct-clock-advancement: If you have interleaved Runnables split