Lines Matching refs:imm
115 void X86Assembler::pushl(const Immediate& imm) { in pushl() argument
117 if (imm.is_int8()) { in pushl()
119 EmitUint8(imm.value() & 0xFF); in pushl()
122 EmitImmediate(imm); in pushl()
140 void X86Assembler::movl(Register dst, const Immediate& imm) { in movl() argument
143 EmitImmediate(imm); in movl()
168 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl() argument
172 EmitImmediate(imm); in movl()
325 void X86Assembler::movb(const Address& dst, const Immediate& imm) { in movb() argument
329 CHECK(imm.is_int8()); in movb()
330 EmitUint8(imm.value() & 0xFF); in movb()
379 void X86Assembler::movw(const Address& dst, const Immediate& imm) { in movw() argument
384 CHECK(imm.is_uint16() || imm.is_int16()); in movw()
385 EmitUint8(imm.value() & 0xFF); in movw()
386 EmitUint8(imm.value() >> 8); in movw()
1830 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() argument
1837 EmitUint8(imm.value()); in roundsd()
1841 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() argument
1848 EmitUint8(imm.value()); in roundss()
2606 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() argument
2612 EmitUint8(imm.value()); in shufpd()
2616 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufps() argument
2621 EmitUint8(imm.value()); in shufps()
2625 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in pshufd() argument
2631 EmitUint8(imm.value()); in pshufd()
3003 void X86Assembler::cmpb(const Address& address, const Immediate& imm) { in cmpb() argument
3007 EmitUint8(imm.value() & 0xFF); in cmpb()
3011 void X86Assembler::cmpw(const Address& address, const Immediate& imm) { in cmpw() argument
3014 EmitComplex(7, address, imm, /* is_16_op= */ true); in cmpw()
3018 void X86Assembler::cmpl(Register reg, const Immediate& imm) { in cmpl() argument
3020 EmitComplex(7, Operand(reg), imm); in cmpl()
3059 void X86Assembler::cmpl(const Address& address, const Immediate& imm) { in cmpl() argument
3061 EmitComplex(7, address, imm); in cmpl()
3104 void X86Assembler::testb(const Address& dst, const Immediate& imm) { in testb() argument
3108 CHECK(imm.is_int8()); in testb()
3109 EmitUint8(imm.value() & 0xFF); in testb()
3113 void X86Assembler::testl(const Address& dst, const Immediate& imm) { in testl() argument
3117 EmitImmediate(imm); in testl()
3135 void X86Assembler::andl(Register dst, const Immediate& imm) { in andl() argument
3137 EmitComplex(4, Operand(dst), imm); in andl()
3141 void X86Assembler::andw(const Address& address, const Immediate& imm) { in andw() argument
3143 CHECK(imm.is_uint16() || imm.is_int16()) << imm.value(); in andw()
3145 EmitComplex(4, address, imm, /* is_16_op= */ true); in andw()
3163 void X86Assembler::orl(Register dst, const Immediate& imm) { in orl() argument
3165 EmitComplex(1, Operand(dst), imm); in orl()
3183 void X86Assembler::xorl(Register dst, const Immediate& imm) { in xorl() argument
3185 EmitComplex(6, Operand(dst), imm); in xorl()
3189 void X86Assembler::addl(Register reg, const Immediate& imm) { in addl() argument
3191 EmitComplex(0, Operand(reg), imm); in addl()
3202 void X86Assembler::addl(const Address& address, const Immediate& imm) { in addl() argument
3204 EmitComplex(0, address, imm); in addl()
3208 void X86Assembler::addw(const Address& address, const Immediate& imm) { in addw() argument
3210 CHECK(imm.is_uint16() || imm.is_int16()) << imm.value(); in addw()
3212 EmitComplex(0, address, imm, /* is_16_op= */ true); in addw()
3216 void X86Assembler::adcl(Register reg, const Immediate& imm) { in adcl() argument
3218 EmitComplex(2, Operand(reg), imm); in adcl()
3243 void X86Assembler::subl(Register reg, const Immediate& imm) { in subl() argument
3245 EmitComplex(5, Operand(reg), imm); in subl()
3291 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) { in imull() argument
3294 int32_t v32 = static_cast<int32_t>(imm.value()); in imull()
3304 EmitImmediate(imm); in imull()
3309 void X86Assembler::imull(Register reg, const Immediate& imm) { in imull() argument
3310 imull(reg, reg, imm); in imull()
3357 void X86Assembler::sbbl(Register reg, const Immediate& imm) { in sbbl() argument
3359 EmitComplex(3, Operand(reg), imm); in sbbl()
3403 void X86Assembler::shll(Register reg, const Immediate& imm) { in shll() argument
3404 EmitGenericShift(4, Operand(reg), imm); in shll()
3413 void X86Assembler::shll(const Address& address, const Immediate& imm) { in shll() argument
3414 EmitGenericShift(4, address, imm); in shll()
3423 void X86Assembler::shrl(Register reg, const Immediate& imm) { in shrl() argument
3424 EmitGenericShift(5, Operand(reg), imm); in shrl()
3433 void X86Assembler::shrl(const Address& address, const Immediate& imm) { in shrl() argument
3434 EmitGenericShift(5, address, imm); in shrl()
3443 void X86Assembler::sarl(Register reg, const Immediate& imm) { in sarl() argument
3444 EmitGenericShift(7, Operand(reg), imm); in sarl()
3453 void X86Assembler::sarl(const Address& address, const Immediate& imm) { in sarl() argument
3454 EmitGenericShift(7, address, imm); in sarl()
3472 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) { in shld() argument
3477 EmitUint8(imm.value() & 0xFF); in shld()
3490 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) { in shrd() argument
3495 EmitUint8(imm.value() & 0xFF); in shrd()
3499 void X86Assembler::roll(Register reg, const Immediate& imm) { in roll() argument
3500 EmitGenericShift(0, Operand(reg), imm); in roll()
3509 void X86Assembler::rorl(Register reg, const Immediate& imm) { in rorl() argument
3510 EmitGenericShift(1, Operand(reg), imm); in rorl()
3533 void X86Assembler::enter(const Immediate& imm) { in enter() argument
3536 CHECK(imm.is_uint16()); in enter()
3537 EmitUint8(imm.value() & 0xFF); in enter()
3538 EmitUint8((imm.value() >> 8) & 0xFF); in enter()
3555 void X86Assembler::ret(const Immediate& imm) { in ret() argument
3558 CHECK(imm.is_uint16()); in ret()
3559 EmitUint8(imm.value() & 0xFF); in ret()
3560 EmitUint8((imm.value() >> 8) & 0xFF); in ret()
3828 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) { in AddImmediate() argument
3829 int value = imm.value(); in AddImmediate()
3834 addl(reg, imm); in AddImmediate()
3919 void X86Assembler::EmitImmediate(const Immediate& imm, bool is_16_op) { in EmitImmediate() argument
3921 EmitUint8(imm.value() & 0xFF); in EmitImmediate()
3922 EmitUint8(imm.value() >> 8); in EmitImmediate()
3924 EmitInt32(imm.value()); in EmitImmediate()
3988 const Immediate& imm) { in EmitGenericShift() argument
3990 CHECK(imm.is_int8()); in EmitGenericShift()
3991 if (imm.value() == 1) { in EmitGenericShift()
3997 EmitUint8(imm.value() & 0xFF); in EmitGenericShift()