Lines Matching refs:fourcc_mod_code
189 #define fourcc_mod_code(vendor, val) \ macro
207 #define DRM_FORMAT_MOD_INVALID fourcc_mod_code(NONE, DRM_FORMAT_RESERVED)
217 #define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0)
233 #define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
248 #define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
263 #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
282 #define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
283 #define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
298 #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
308 #define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1)
320 #define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2)
329 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3)
338 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
347 #define DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED fourcc_mod_code(NVIDIA, 1)
371 fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf))
374 fourcc_mod_code(NVIDIA, 0x10)
376 fourcc_mod_code(NVIDIA, 0x11)
378 fourcc_mod_code(NVIDIA, 0x12)
380 fourcc_mod_code(NVIDIA, 0x13)
382 fourcc_mod_code(NVIDIA, 0x14)
384 fourcc_mod_code(NVIDIA, 0x15)
405 #define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1)