Lines Matching refs:n_gt_4
3302 TEST(QU8_GEMM_MINMAX_FP32_3X4C2__SSE2_LD64, n_gt_4) { in TEST() argument
3807 TEST(QU8_GEMM_MINMAX_FP32_3X4C2__SSE41_LD64, n_gt_4) { in TEST() argument
4312 TEST(QU8_GEMM_MINMAX_FP32_2X4C2__AVX_LD64, n_gt_4) { in TEST() argument
4817 TEST(QU8_GEMM_MINMAX_FP32_2X4C2__XOP_LD64, n_gt_4) { in TEST() argument
5322 TEST(QU8_GEMM_MINMAX_FP32_3X4C2__AVX_LD64, n_gt_4) { in TEST() argument
5827 TEST(QU8_GEMM_MINMAX_FP32_3X4C2__XOP_LD64, n_gt_4) { in TEST() argument
6332 TEST(QU8_GEMM_MINMAX_FP32_4X4C2__AVX_LD64, n_gt_4) { in TEST() argument
6837 TEST(QU8_GEMM_MINMAX_FP32_4X4C2__XOP_LD64, n_gt_4) { in TEST() argument
7342 TEST(QU8_GEMM_MINMAX_FP32_1X4C2__SSE2_LD128, n_gt_4) { in TEST() argument
7847 TEST(QU8_GEMM_MINMAX_FP32_2X4C2__SSE2_LD128, n_gt_4) { in TEST() argument
8352 TEST(QU8_GEMM_MINMAX_FP32_3X4C2__SSE41_LD128, n_gt_4) { in TEST() argument
8857 TEST(QU8_GEMM_MINMAX_FP32_4X4C2__SSE2_LD128, n_gt_4) { in TEST() argument
9362 TEST(QU8_GEMM_MINMAX_FP32_4X4C2__SSE41_LD128, n_gt_4) { in TEST() argument
9867 TEST(QU8_GEMM_MINMAX_FP32_1X4C2__XOP_LD128, n_gt_4) { in TEST() argument
10372 TEST(QU8_GEMM_MINMAX_FP32_2X4C2__XOP_LD128, n_gt_4) { in TEST() argument
10877 TEST(QU8_GEMM_MINMAX_FP32_3X4C2__AVX_LD128, n_gt_4) { in TEST() argument
11382 TEST(QU8_GEMM_MINMAX_FP32_4X4C2__XOP_LD128, n_gt_4) { in TEST() argument
11887 TEST(QU8_GEMM_MINMAX_FP32_2X4C2S4__SSE41_LD64, n_gt_4) { in TEST() argument
12392 TEST(QU8_GEMM_MINMAX_FP32_3X4C2S4__SSE2_LD64, n_gt_4) { in TEST() argument
12897 TEST(QU8_GEMM_MINMAX_FP32_3X4C2S4__SSE41_LD64, n_gt_4) { in TEST() argument
13402 TEST(QU8_GEMM_MINMAX_FP32_4X4C2S4__SSE2_LD64, n_gt_4) { in TEST() argument
13907 TEST(QU8_GEMM_MINMAX_FP32_3X4C2S4__AVX_LD64, n_gt_4) { in TEST() argument
14412 TEST(QU8_GEMM_MINMAX_FP32_3X4C2S4__XOP_LD64, n_gt_4) { in TEST() argument
14917 TEST(QU8_GEMM_MINMAX_FP32_1X4C2S4__SSE2_LD128, n_gt_4) { in TEST() argument
15422 TEST(QU8_GEMM_MINMAX_FP32_4X4C2S4__SSE2_LD128, n_gt_4) { in TEST() argument
15927 TEST(QU8_GEMM_MINMAX_FP32_4X4C2S4__SSE41_LD128, n_gt_4) { in TEST() argument
16432 TEST(QU8_GEMM_MINMAX_FP32_1X4C2S4__XOP_LD128, n_gt_4) { in TEST() argument
16937 TEST(QU8_GEMM_MINMAX_FP32_2X4C2S4__XOP_LD128, n_gt_4) { in TEST() argument
17442 TEST(QU8_GEMM_MINMAX_FP32_3X4C2S4__AVX_LD128, n_gt_4) { in TEST() argument
17947 TEST(QU8_GEMM_MINMAX_FP32_4X4C2S4__AVX_LD128, n_gt_4) { in TEST() argument
18452 TEST(QU8_GEMM_MINMAX_FP32_1X4C8__SSE2_LD64, n_gt_4) { in TEST() argument
18957 TEST(QU8_GEMM_MINMAX_FP32_2X4C8__SSE2_LD64, n_gt_4) { in TEST() argument
19462 TEST(QU8_GEMM_MINMAX_FP32_3X4C8__SSE41_LD64, n_gt_4) { in TEST() argument
19967 TEST(QU8_GEMM_MINMAX_FP32_2X4C8__AVX_LD64, n_gt_4) { in TEST() argument
20472 TEST(QU8_GEMM_MINMAX_FP32_2X4C8__XOP_LD64, n_gt_4) { in TEST() argument
20977 TEST(QU8_GEMM_MINMAX_FP32_3X4C8__AVX_LD64, n_gt_4) { in TEST() argument
21482 TEST(QU8_GEMM_MINMAX_FP32_3X4C8__XOP_LD64, n_gt_4) { in TEST() argument
21987 TEST(QU8_GEMM_MINMAX_FP32_1X4C8__SSE2_LD128, n_gt_4) { in TEST() argument
22492 TEST(QU8_GEMM_MINMAX_FP32_1X4C8__SSE41_LD128, n_gt_4) { in TEST() argument
22997 TEST(QU8_GEMM_MINMAX_FP32_2X4C8__SSE2_LD128, n_gt_4) { in TEST() argument
23502 TEST(QU8_GEMM_MINMAX_FP32_2X4C8__SSE41_LD128, n_gt_4) { in TEST() argument
24007 TEST(QU8_GEMM_MINMAX_FP32_1X4C8__AVX_LD128, n_gt_4) { in TEST() argument
24512 TEST(QU8_GEMM_MINMAX_FP32_2X4C8__AVX_LD128, n_gt_4) { in TEST() argument
25017 TEST(QU8_GEMM_MINMAX_FP32_3X4C8__XOP_LD128, n_gt_4) { in TEST() argument
27022 TEST(QU8_GEMM_MINMAX_FP32_1X4C2S4__WASMSIMD_DOT16X2_LD128, n_gt_4) { in TEST() argument
27497 TEST(QU8_GEMM_MINMAX_FP32_1X4C8__WASMSIMD_DOT16X2_LD64, n_gt_4) { in TEST() argument
27972 TEST(QU8_GEMM_MINMAX_FP32_2X4C2__WASMSIMD_DOT16X2_LD64, n_gt_4) { in TEST() argument
28447 TEST(QU8_GEMM_MINMAX_FP32_3X4C2S4__WASMSIMD_DOT16X2_LD128, n_gt_4) { in TEST() argument
28922 TEST(QU8_GEMM_MINMAX_FP32_3X4C8__WASMSIMD_DOT16X2_LD64, n_gt_4) { in TEST() argument
29397 TEST(QU8_GEMM_MINMAX_FP32_4X4C2__WASMSIMD_DOT16X2_LD64, n_gt_4) { in TEST() argument
29872 TEST(QU8_GEMM_MINMAX_FP32_4X4C2__WASMSIMD_DOT16X2_LD128, n_gt_4) { in TEST() argument
30347 TEST(QU8_GEMM_MINMAX_FP32_4X4C8__WASMSIMD_DOT16X2_LD128, n_gt_4) { in TEST() argument
31105 TEST(QU8_GEMM_MINMAX_FP32_1X4__WASM_FMAGIC, n_gt_4) { in TEST() argument
31863 TEST(QU8_GEMM_MINMAX_FP32_2X4__WASM_FMAGIC, n_gt_4) { in TEST() argument
32621 TEST(QU8_GEMM_MINMAX_FP32_4X4__WASM_FMAGIC, n_gt_4) { in TEST() argument
33753 TEST(QU8_GEMM_MINMAX_FP32_1X4__SCALAR_FMAGIC, n_gt_4) { in TEST() argument
34130 TEST(QU8_GEMM_MINMAX_FP32_1X4__SCALAR_LRINTF, n_gt_4) { in TEST() argument
35261 TEST(QU8_GEMM_MINMAX_FP32_2X4__SCALAR_FMAGIC, n_gt_4) { in TEST() argument
35638 TEST(QU8_GEMM_MINMAX_FP32_2X4__SCALAR_LRINTF, n_gt_4) { in TEST() argument
36392 TEST(QU8_GEMM_MINMAX_FP32_3X4__SCALAR_IMAGIC, n_gt_4) { in TEST() argument
37146 TEST(QU8_GEMM_MINMAX_FP32_4X4__SCALAR_IMAGIC, n_gt_4) { in TEST() argument