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Lines Matching refs:k_gt_8

1691   TEST(QU8_IGEMM_MINMAX_FP32_1X16__NEONV8_MLAL_LANE, k_gt_8) {  in TEST()  argument
2208 TEST(QU8_IGEMM_MINMAX_FP32_1X16C4__NEONDOT, k_gt_8) { in TEST() argument
2725 TEST(QU8_IGEMM_MINMAX_FP32_4X16__NEON_MLAL_LANE, k_gt_8) { in TEST() argument
3242 TEST(QU8_IGEMM_MINMAX_FP32_4X16__NEONV8_MLAL_LANE, k_gt_8) { in TEST() argument
3759 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2__SSE41_LD64, k_gt_8) { in TEST() argument
4276 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2__SSE41_LD64, k_gt_8) { in TEST() argument
4793 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2__SSE2_LD64, k_gt_8) { in TEST() argument
5310 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2__SSE41_LD64, k_gt_8) { in TEST() argument
5827 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2__AVX_LD64, k_gt_8) { in TEST() argument
6344 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2__XOP_LD64, k_gt_8) { in TEST() argument
6861 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2__AVX_LD64, k_gt_8) { in TEST() argument
7378 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2__XOP_LD64, k_gt_8) { in TEST() argument
7895 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2__AVX_LD64, k_gt_8) { in TEST() argument
8412 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2__XOP_LD64, k_gt_8) { in TEST() argument
8929 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2__SSE2_LD128, k_gt_8) { in TEST() argument
9446 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2__SSE41_LD128, k_gt_8) { in TEST() argument
9963 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2__SSE41_LD128, k_gt_8) { in TEST() argument
10480 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2__XOP_LD128, k_gt_8) { in TEST() argument
10997 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2__XOP_LD128, k_gt_8) { in TEST() argument
11514 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2__AVX_LD128, k_gt_8) { in TEST() argument
12031 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2__XOP_LD128, k_gt_8) { in TEST() argument
12548 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2S4__SSE41_LD64, k_gt_8) { in TEST() argument
13065 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2S4__SSE2_LD64, k_gt_8) { in TEST() argument
13582 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2S4__SSE41_LD64, k_gt_8) { in TEST() argument
14099 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__SSE2_LD64, k_gt_8) { in TEST() argument
14616 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2S4__AVX_LD64, k_gt_8) { in TEST() argument
15133 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2S4__XOP_LD64, k_gt_8) { in TEST() argument
15650 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2S4__AVX_LD64, k_gt_8) { in TEST() argument
16167 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2S4__XOP_LD64, k_gt_8) { in TEST() argument
16684 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__AVX_LD64, k_gt_8) { in TEST() argument
17201 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__XOP_LD64, k_gt_8) { in TEST() argument
17718 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2S4__SSE2_LD128, k_gt_8) { in TEST() argument
18235 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__SSE2_LD128, k_gt_8) { in TEST() argument
18752 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__SSE41_LD128, k_gt_8) { in TEST() argument
19269 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2S4__XOP_LD128, k_gt_8) { in TEST() argument
19786 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2S4__XOP_LD128, k_gt_8) { in TEST() argument
20303 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2S4__AVX_LD128, k_gt_8) { in TEST() argument
20820 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__AVX_LD128, k_gt_8) { in TEST() argument
21337 TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__SSE2_LD64, k_gt_8) { in TEST() argument
21854 TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__SSE41_LD64, k_gt_8) { in TEST() argument
22371 TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__SSE2_LD64, k_gt_8) { in TEST() argument
22888 TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__SSE41_LD64, k_gt_8) { in TEST() argument
23405 TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__AVX_LD64, k_gt_8) { in TEST() argument
23922 TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__XOP_LD64, k_gt_8) { in TEST() argument
24439 TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__AVX_LD64, k_gt_8) { in TEST() argument
24956 TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__XOP_LD64, k_gt_8) { in TEST() argument
25473 TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__SSE41_LD128, k_gt_8) { in TEST() argument
25990 TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__SSE41_LD128, k_gt_8) { in TEST() argument
26507 TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__SSE2_LD128, k_gt_8) { in TEST() argument
27024 TEST(QU8_IGEMM_MINMAX_FP32_1X4C8__AVX_LD128, k_gt_8) { in TEST() argument
27541 TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__AVX_LD128, k_gt_8) { in TEST() argument
28058 TEST(QU8_IGEMM_MINMAX_FP32_3X4C8__XOP_LD128, k_gt_8) { in TEST() argument
28575 TEST(QU8_IGEMM_MINMAX_FP32_1X8C8__AVX2, k_gt_8) { in TEST() argument
29092 TEST(QU8_IGEMM_MINMAX_FP32_1X16C8__AVX512SKX, k_gt_8) { in TEST() argument
29609 TEST(QU8_IGEMM_MINMAX_FP32_2X16C8__AVX512SKX, k_gt_8) { in TEST() argument
30126 TEST(QU8_IGEMM_MINMAX_FP32_4X16C8__AVX512SKX, k_gt_8) { in TEST() argument
30636 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
31123 TEST(QU8_IGEMM_MINMAX_FP32_1X4C2S4__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
31610 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2S4__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
32097 TEST(QU8_IGEMM_MINMAX_FP32_2X4C2S4__WASMSIMD_DOT16X2_LD128, k_gt_8) { in TEST() argument
32584 TEST(QU8_IGEMM_MINMAX_FP32_2X4C8__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
33071 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
33558 TEST(QU8_IGEMM_MINMAX_FP32_3X4C2S4__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
34045 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2__WASMSIMD_DOT16X2_LD128, k_gt_8) { in TEST() argument
34532 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
35019 TEST(QU8_IGEMM_MINMAX_FP32_4X4C2S4__WASMSIMD_DOT16X2_LD128, k_gt_8) { in TEST() argument
35506 TEST(QU8_IGEMM_MINMAX_FP32_4X4C8__WASMSIMD_DOT16X2_LD64, k_gt_8) { in TEST() argument
35993 TEST(QU8_IGEMM_MINMAX_FP32_4X4C8__WASMSIMD_DOT16X2_LD128, k_gt_8) { in TEST() argument