Lines Matching refs:handle
66 static int32_t chal_sd_set_power(struct sd_dev *handle,
69 static void chal_sd_set_dma_boundary(struct sd_dev *handle, uint32_t boundary);
71 static int32_t chal_sd_setup_handler(struct sd_dev *handle,
78 static int32_t chal_sd_set_power(struct sd_dev *handle, in chal_sd_set_power() argument
84 if (handle == NULL) in chal_sd_set_power()
87 mmio_clrsetbits_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_power()
101 rc = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_power()
119 mmio_setbits_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL_OFFSET, in chal_sd_set_power()
123 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_ARG_OFFSET, 0); in chal_sd_set_power()
124 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CMD_OFFSET, 0); in chal_sd_set_power()
132 rc = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_power()
159 static void chal_sd_set_dma_boundary(struct sd_dev *handle, uint32_t boundary) in chal_sd_set_dma_boundary() argument
161 if (handle == NULL) in chal_sd_set_dma_boundary()
164 mmio_clrsetbits_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_dma_boundary()
169 static int32_t chal_sd_setup_handler(struct sd_dev *handle, uint32_t sdBase, in chal_sd_setup_handler() argument
172 if (handle == NULL) in chal_sd_setup_handler()
175 handle->ctrl.sdRegBaseAddr = sdBase; in chal_sd_setup_handler()
176 handle->ctrl.hostRegBaseAddr = hostBase; in chal_sd_setup_handler()
177 handle->ctrl.present = 0; in chal_sd_setup_handler()
178 handle->ctrl.rca = 0; in chal_sd_setup_handler()
179 handle->ctrl.blkGapEnable = 0; in chal_sd_setup_handler()
180 handle->ctrl.cmdStatus = 0; in chal_sd_setup_handler()
193 struct sd_dev *handle; in chal_sd_init() local
200 handle = (struct sd_dev *)sd_handle; in chal_sd_init()
252 ctl_val = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_init()
256 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL1_OFFSET, in chal_sd_init()
260 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_INTREN1_OFFSET, in chal_sd_init()
262 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_INTREN2_OFFSET, in chal_sd_init()
267 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_INTREN1_OFFSET, in chal_sd_init()
269 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_INTREN2_OFFSET, in chal_sd_init()
273 cap_val_l = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_init()
275 handle->cfg.voltage = 0; in chal_sd_init()
279 handle->cfg.voltage |= SD_VDD_WINDOW_3_3_TO_3_4; in chal_sd_init()
282 handle->cfg.voltage |= SD_VDD_WINDOW_3_0_TO_3_1; in chal_sd_init()
285 handle->cfg.voltage |= SD_VDD_WINDOW_1_8_TO_1_9; in chal_sd_init()
289 rval = chal_sd_set_power(handle, voltage, SD4_EMMC_TOP_CTRL_SDPWR_MASK); in chal_sd_init()
291 ctl_val = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_init()
293 handle->ctrl.version = ((ctl_val >> 16) & 0xFF); in chal_sd_init()
300 struct sd_dev *handle; in chal_sd_set_speed() local
305 handle = (struct sd_dev *) sd_handle; in chal_sd_set_speed()
309 mmio_setbits_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_speed()
314 mmio_clrbits_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_speed()
342 struct sd_dev *handle; in chal_sd_check_cap() local
347 handle = (struct sd_dev *) sd_handle; in chal_sd_check_cap()
349 if (caps & mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_check_cap()
360 struct sd_dev *handle; in chal_sd_start() local
366 handle = (struct sd_dev *) sd_handle; in chal_sd_start()
368 handle->cfg.mode = SD_PIO_MODE; /* set to PIO mode first for init */ in chal_sd_start()
369 handle->cfg.dma = SD_DMA_OFF; in chal_sd_start()
371 chal_sd_setup_handler(handle, sd_base, host_base); in chal_sd_start()
380 handle->ctrl.eventList = 0; in chal_sd_start()
381 handle->cfg.mode = mode; in chal_sd_start()
391 struct sd_dev *handle; in chal_sd_get_atuo12_error() local
396 handle = (struct sd_dev *) sd_handle; in chal_sd_get_atuo12_error()
398 return (mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_atuo12_error()
407 struct sd_dev *handle; in chal_sd_get_present_status() local
412 handle = (struct sd_dev *) sd_handle; in chal_sd_get_present_status()
414 return mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_present_status()
424 struct sd_dev *handle; in chal_sd_config_bus_width() local
429 handle = (struct sd_dev *)sd_handle; in chal_sd_config_bus_width()
431 ctl_val = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_config_bus_width()
452 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL_OFFSET, in chal_sd_config_bus_width()
464 struct sd_dev *handle; in chal_sd_set_dma() local
470 handle = (struct sd_dev *)sd_handle; in chal_sd_set_dma()
481 handle->cfg.dma = mode; in chal_sd_set_dma()
482 val = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_dma()
485 val |= handle->cfg.dma - 1; in chal_sd_set_dma()
486 mmio_write_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_dma()
491 handle->cfg.dma = 0; in chal_sd_set_dma()
502 struct sd_dev *handle; in chal_sd_get_dma_addr() local
507 handle = (struct sd_dev *) sd_handle; in chal_sd_get_dma_addr()
509 if (handle->cfg.dma == SD_DMA_OFF) in chal_sd_get_dma_addr()
512 return (uintptr_t)mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_dma_addr()
520 struct sd_dev *handle; in chal_sd_send_cmd() local
525 handle = (struct sd_dev *) sd_handle; in chal_sd_send_cmd()
537 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_BLOCK_OFFSET, in chal_sd_send_cmd()
538 handle->ctrl.blkReg); in chal_sd_send_cmd()
541 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_ARG_OFFSET, in chal_sd_send_cmd()
543 handle->ctrl.argReg = argument; in chal_sd_send_cmd()
551 cmd_mode_reg |= ((handle->cfg.dma) ? 1 : 0); in chal_sd_send_cmd()
553 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CMD_OFFSET, in chal_sd_send_cmd()
556 handle->ctrl.cmdIndex = cmd_idx; in chal_sd_send_cmd()
563 struct sd_dev *handle; in chal_sd_set_dma_addr() local
568 handle = (struct sd_dev *) sd_handle; in chal_sd_set_dma_addr()
570 if (handle->cfg.dma == SD_DMA_OFF) in chal_sd_set_dma_addr()
573 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_SYSADDR_OFFSET, in chal_sd_set_dma_addr()
616 struct sd_dev *handle; in chal_sd_set_clock() local
627 handle = (struct sd_dev *) sd_handle; in chal_sd_set_clock()
630 value = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_clock()
636 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL1_OFFSET, in chal_sd_set_clock()
651 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL1_OFFSET, in chal_sd_set_clock()
656 value = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_clock()
672 value = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_clock()
678 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL1_OFFSET, in chal_sd_set_clock()
693 struct sd_dev *handle; in chal_sd_setup_xfer() local
698 handle = (struct sd_dev *) sd_handle; in chal_sd_setup_xfer()
700 if (length <= handle->cfg.blockSize) { in chal_sd_setup_xfer()
701 handle->ctrl.blkReg = length | handle->cfg.dmaBoundary; in chal_sd_setup_xfer()
703 blocks = length / handle->cfg.blockSize; in chal_sd_setup_xfer()
704 handle->ctrl.blkReg = (blocks << 16) | handle->cfg.blockSize | in chal_sd_setup_xfer()
705 handle->cfg.dmaBoundary; in chal_sd_setup_xfer()
708 if (handle->cfg.dma != SD_DMA_OFF) { in chal_sd_setup_xfer()
710 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_SYSADDR_OFFSET, in chal_sd_setup_xfer()
728 struct sd_dev *handle; in chal_sd_write_buffer() local
733 handle = (struct sd_dev *) sd_handle; in chal_sd_write_buffer()
735 blockSize = handle->cfg.blockSize; in chal_sd_write_buffer()
750 mmio_write_32(handle->ctrl.sdRegBaseAddr + in chal_sd_write_buffer()
766 mmio_write_32(handle->ctrl.sdRegBaseAddr + in chal_sd_write_buffer()
783 struct sd_dev *handle; in chal_sd_read_buffer() local
788 handle = (struct sd_dev *)sd_handle; in chal_sd_read_buffer()
792 blockSize = handle->cfg.blockSize; in chal_sd_read_buffer()
805 mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_read_buffer()
811 value = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_read_buffer()
834 struct sd_dev *handle; in chal_sd_reset_line() local
839 handle = (struct sd_dev *) sd_handle; in chal_sd_reset_line()
846 control = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_reset_line()
849 mmio_write_32(handle->ctrl.sdRegBaseAddr + SD4_EMMC_TOP_CTRL1_OFFSET, in chal_sd_reset_line()
854 control = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_reset_line()
867 struct sd_dev *handle; in chal_sd_get_response() local
872 handle = (struct sd_dev *) sd_handle; in chal_sd_get_response()
873 resp[0] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
875 resp[1] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
877 resp[2] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
879 resp[3] = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_response()
891 struct sd_dev *handle; in chal_sd_clear_pending_irq() local
896 handle = (struct sd_dev *)sd_handle; in chal_sd_clear_pending_irq()
900 mmio_write_32(handle->ctrl.sdRegBaseAddr + in chal_sd_clear_pending_irq()
903 } while (mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_clear_pending_irq()
914 struct sd_dev *handle; in chal_sd_get_irq_status() local
919 handle = (struct sd_dev *) sd_handle; in chal_sd_get_irq_status()
921 return (mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_get_irq_status()
930 struct sd_dev *handle; in chal_sd_clear_irq() local
935 handle = (struct sd_dev *) sd_handle; in chal_sd_clear_irq()
939 mmio_write_32(handle->ctrl.sdRegBaseAddr + in chal_sd_clear_irq()
943 mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_clear_irq()
955 struct sd_dev *handle; in chal_sd_config() local
960 handle = (struct sd_dev *) sd_handle; in chal_sd_config()
962 handle->cfg.speedMode = speed; in chal_sd_config()
963 handle->cfg.retryLimit = retry; in chal_sd_config()
964 handle->cfg.dmaBoundary = boundary; in chal_sd_config()
965 handle->cfg.blockSize = blkSize; in chal_sd_config()
969 chal_sd_set_dma_boundary(handle, boundary); in chal_sd_config()
983 struct sd_dev *handle; in chal_sd_dump_fifo() local
988 handle = (struct sd_dev *)sd_handle; in chal_sd_dump_fifo()
991 while (mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_dump_fifo()
993 mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_dump_fifo()
1004 struct sd_dev *handle; in chal_sd_set_irq_signal() local
1009 handle = (struct sd_dev *)sd_handle; in chal_sd_set_irq_signal()
1012 mmio_setbits_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_irq_signal()
1015 mmio_clrbits_32(handle->ctrl.sdRegBaseAddr + in chal_sd_set_irq_signal()