139 static uint32_t mt_irq_get_pol(uint32_t irq)  in mt_irq_get_pol()  argument
145 	if (irq < 32U) {  in mt_irq_get_pol()
149 	reg = ((irq - 32U) / 32U);  in mt_irq_get_pol()
157 unsigned int mt_irq_get_sens(unsigned int irq)  in mt_irq_get_sens()  argument
165 	config = mmio_read_32(MT_GIC_BASE + GICD_ICFGR + (irq / 16U) * 4U);  in mt_irq_get_sens()
166 	config = (config >> (irq % 16U) * 2U) & 0x3;  in mt_irq_get_sens()
299 uint32_t mt_irq_get_en(uint32_t irq)  in mt_irq_get_en()  argument
303 	addr = BASE_GICD_BASE + GICD_ISENABLER + (irq / 32U) * 4U;  in mt_irq_get_en()
306 	val = (st >> (irq % 32U)) & 1U;  in mt_irq_get_en()
476 void mt_irq_unmask_for_sleep_ex(uint32_t irq)  in mt_irq_unmask_for_sleep_ex()  argument
480 	mask = 1U << (irq % 32U);  in mt_irq_unmask_for_sleep_ex()
483 		((irq / 32U) * 4U), mask);  in mt_irq_unmask_for_sleep_ex()