Lines Matching +full:llvm +full:- +full:3
1 // RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -emit-llvm -o - %s | op…
27 // CHECK: call {{.*}} @llvm.arm.hint(i32 0)
33 // CHECK: call {{.*}} @llvm.arm.hint(i32 1)
39 // CHECK: call {{.*}} @llvm.arm.hint(i32 2)
45 // CHECK: call {{.*}} @llvm.arm.hint(i32 3)
51 // CHECK: call {{.*}} @llvm.arm.hint(i32 4)
57 // CHECK: call {{.*}} @llvm.arm.hint(i32 5)
63 // CHECK: call {{.*}} @llvm.arm.dbg(i32 0)
66 __builtin_arm_dmb(1); //CHECK: call {{.*}} @llvm.arm.dmb(i32 1) in test_barrier()
67 __builtin_arm_dsb(2); //CHECK: call {{.*}} @llvm.arm.dsb(i32 2) in test_barrier()
68 __builtin_arm_isb(3); //CHECK: call {{.*}} @llvm.arm.isb(i32 3) in test_barrier()
71 // CHECK: call {{.*}} @llvm.arm.rbit(i32 %a)
79 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 0, i32 3, i32 1) in prefetch()
82 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 1) in prefetch()
86 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) in prefetch()
91 // CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i) in ldc()
92 // CHECK-NEXT: ret void in ldc()
98 // CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i) in ldcl()
99 // CHECK-NEXT: ret void in ldcl()
105 // CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i) in ldc2()
106 // CHECK-NEXT: ret void in ldc2()
112 // CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) in ldc2l()
113 // CHECK-NEXT: ret void in ldc2l()
119 // CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i) in stc()
120 // CHECK-NEXT: ret void in stc()
126 // CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i) in stcl()
127 // CHECK-NEXT: ret void in stcl()
133 // CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) in stc2()
134 // CHECK-NEXT: ret void in stc2()
140 // CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i) in stc2l()
141 // CHECK-NEXT: ret void in stc2l()
147 // CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) in cdp()
148 // CHECK-NEXT: ret void in cdp()
149 __builtin_arm_cdp(1, 2, 3, 4, 5, 6); in cdp()
154 // CHECK: call void @llvm.arm.cdp2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) in cdp2()
155 // CHECK-NEXT: ret void in cdp2()
156 __builtin_arm_cdp2(1, 2, 3, 4, 5, 6); in cdp2()
161 // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3) in mrc()
162 // CHECK-NEXT: ret i32 [[R]] in mrc()
163 return __builtin_arm_mrc(15, 0, 13, 0, 3); in mrc()
168 // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc2(i32 15, i32 0, i32 13, i32 0, i32 3) in mrc2()
169 // CHECK-NEXT: ret i32 [[R]] in mrc2()
170 return __builtin_arm_mrc2(15, 0, 13, 0, 3); in mrc2()
175 // CHECK: call void @llvm.arm.mcr(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3) in mcr()
176 __builtin_arm_mcr(15, 0, a, 13, 0, 3); in mcr()
181 // CHECK: call void @llvm.arm.mcr2(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3) in mcr2()
182 __builtin_arm_mcr2(15, 0, a, 13, 0, 3); in mcr2()
187 // CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) in mcrr()
193 // CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0) in mcrr2()
199 // CHECK: call { i32, i32 } @llvm.arm.mrrc(i32 15, i32 0, i32 0) in mrrc()
205 // CHECK: call { i32, i32 } @llvm.arm.mrrc2(i32 15, i32 0, i32 0) in mrrc2()
210 // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i32 @llvm.read_register.i32(metadata ![[M0:.*]]) in rsr()
211 // CHECK-NEXT: ret i32 [[V0]] in rsr()
216 // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M1:.*]]) in rsr64()
217 // CHECK-NEXT: ret i64 [[V0]] in rsr64()
222 // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i32 @llvm.read_register.i32(metadata ![[M2:.*]]) in rsrp()
223 // CHECK-NEXT: [[V1:[%A-Za-z0-9.]+]] = inttoptr i32 [[V0]] to i8* in rsrp()
224 // CHECK-NEXT: ret i8* [[V1]] in rsrp()
229 // CHECK: call void @llvm.write_register.i32(metadata ![[M0]], i32 %v) in wsr()
234 // CHECK: call void @llvm.write_register.i64(metadata ![[M1]], i64 %v) in wsr64()
239 // CHECK: [[V0:[%A-Za-z0-9.]+]] = ptrtoint i8* %v to i32 in wsrp()
240 // CHECK-NEXT: call void @llvm.write_register.i32(metadata ![[M2]], i32 [[V0]]) in wsrp()