Lines Matching +full:llvm +full:- +full:3
1 // RUN: %clang_cc1 -triple arm64-unknown-linux -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
10 // CHECK: call {{.*}} @llvm.thread.pointer() in tp()
13 // CHECK: call {{.*}} @llvm.aarch64.rbit.i32(i32 %a)
18 // CHECK: call {{.*}} @llvm.aarch64.rbit.i64(i64 %a)
24 __builtin_arm_nop(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 0) in hints()
25 __builtin_arm_yield(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 1) in hints()
26 __builtin_arm_wfe(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 2) in hints()
27 __builtin_arm_wfi(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 3) in hints()
28 __builtin_arm_sev(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 4) in hints()
29 __builtin_arm_sevl(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 5) in hints()
33 __builtin_arm_dmb(1); //CHECK: call {{.*}} @llvm.aarch64.dmb(i32 1) in barriers()
34 __builtin_arm_dsb(2); //CHECK: call {{.*}} @llvm.aarch64.dsb(i32 2) in barriers()
35 __builtin_arm_isb(3); //CHECK: call {{.*}} @llvm.aarch64.isb(i32 3) in barriers()
40 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 1, i32 1, i32 1) in prefetch()
43 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1) in prefetch()
46 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1) in prefetch()
49 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0) in prefetch()
53 // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) in rsr()
54 // CHECK-NEXT: trunc i64 [[V0]] to i32 in rsr()
55 return __builtin_arm_rsr("1:2:3:4:5"); in rsr()
59 // CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) in rsr64()
60 return __builtin_arm_rsr64("1:2:3:4:5"); in rsr64()
64 // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) in rsrp()
65 // CHECK-NEXT: inttoptr i64 [[V0]] to i8* in rsrp()
66 return __builtin_arm_rsrp("1:2:3:4:5"); in rsrp()
70 // CHECK: [[V0:[%A-Za-z0-9.]+]] = zext i32 %v to i64 in wsr()
71 // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]]) in wsr()
72 __builtin_arm_wsr("1:2:3:4:5", v); in wsr()
76 // CHECK: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 %v) in wsr64()
77 __builtin_arm_wsr64("1:2:3:4:5", v); in wsr64()
81 // CHECK: [[V0:[%A-Za-z0-9.]+]] = ptrtoint i8* %v to i64 in wsrp()
82 // CHECK-NEXT: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 [[V0]]) in wsrp()
83 __builtin_arm_wsrp("1:2:3:4:5", v); in wsrp()
86 // CHECK: ![[M0]] = !{!"1:2:3:4:5"}