Lines Matching +full:- +full:- +full:cpus
58 * - Intel, AMD: ecx[bit 26] in basic info = XSAVE/XRSTOR instructions supported by a chip. in cpuinfo_x86_detect_isa()
59 * - Intel, AMD: ecx[bit 27] in basic info = XSAVE/XRSTOR instructions enabled by OS. in cpuinfo_x86_detect_isa()
73 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 1] for low 128 bits of ymm registers in cpuinfo_x86_detect_isa()
74 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 2] for high 128 bits of ymm registers in cpuinfo_x86_detect_isa()
83 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 1] for low 128 bits of zmm registers in cpuinfo_x86_detect_isa()
84 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 2] for bits 128-255 of zmm registers in cpuinfo_x86_detect_isa()
85 * - Intel: XFEATURE_ENABLED_MASK[bit 5] for 8 64-bit OpMask registers (k0-k7) in cpuinfo_x86_detect_isa()
86 * - Intel: XFEATURE_ENABLED_MASK[bit 6] for the high 256 bits of the zmm registers zmm0-zmm15 in cpuinfo_x86_detect_isa()
87 * - Intel: XFEATURE_ENABLED_MASK[bit 7] for the 512-bit zmm registers zmm16-zmm31 in cpuinfo_x86_detect_isa()
96 * - Intel: XFEATURE_ENABLED_MASK[bit 3] for BNDREGS in cpuinfo_x86_detect_isa()
97 * - Intel: XFEATURE_ENABLED_MASK[bit 4] for BNDCSR in cpuinfo_x86_detect_isa()
108 * - Intel, AMD: edx[bit 4] in basic info. in cpuinfo_x86_detect_isa()
109 * - AMD: edx[bit 4] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
116 * - Intel, AMD: edx[bit 11] in basic info. in cpuinfo_x86_detect_isa()
123 * - Intel, AMD: edx[bit 11] in extended info. in cpuinfo_x86_detect_isa()
130 * - Intel, AMD: edx[bit 5] in basic info. in cpuinfo_x86_detect_isa()
131 * - AMD: edx[bit 5] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
137 * - AMD: ebx[bit 0] in processor capacity info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
143 * - Intel, AMD: edx[bit 19] in basic info. in cpuinfo_x86_detect_isa()
149 * - Intel: ebx[bit 23] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
155 * - Intel, AMD: ecx[bit 3] in basic info. in cpuinfo_x86_detect_isa()
161 * - AMD: ecx[bit 29] in extended info. in cpuinfo_x86_detect_isa()
167 * - Intel, AMD: edx[bit 24] in basic info. in cpuinfo_x86_detect_isa()
168 * - AMD: edx[bit 24] in extended info (zero bit on Intel CPUs, EMMX bit on Cyrix CPUs). in cpuinfo_x86_detect_isa()
184 * - Intel, AMD: ecx[bit 26] in basic info. in cpuinfo_x86_detect_isa()
191 * - Intel, AMD: edx[bit 0] in basic info. in cpuinfo_x86_detect_isa()
192 * - AMD: edx[bit 0] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
198 * - Intel, AMD: edx[bit 23] in basic info. in cpuinfo_x86_detect_isa()
199 * - AMD: edx[bit 23] in extended info (zero bit on Intel CPUs). in cpuinfo_x86_detect_isa()
205 * - Intel, AMD: edx[bit 25] in basic info (SSE feature flag). in cpuinfo_x86_detect_isa()
206 * - Pre-SSE AMD: edx[bit 22] in extended info (zero bit on Intel CPUs). in cpuinfo_x86_detect_isa()
213 * - AMD: edx[bit 31] of extended info (zero bit on Intel CPUs). in cpuinfo_x86_detect_isa()
219 * - AMD: edx[bit 30] of extended info (zero bit on Intel CPUs). in cpuinfo_x86_detect_isa()
226 * - No CPUID bit, detect as Geode microarchitecture + 3dnow!+ support in cpuinfo_x86_detect_isa()
233 * - AMD: ecx[bit 8] of extended info (one of 3dnow! prefetch instructions). in cpuinfo_x86_detect_isa()
235 * - AMD: edx[bit 31] of extended info (implied by 3dnow! support). Reserved bit on Intel CPUs. in cpuinfo_x86_detect_isa()
236 * - AMD: edx[bit 30] of extended info (implied by 3dnow!+ support). Reserved bit on Intel CPUs. in cpuinfo_x86_detect_isa()
237 …* - AMD: edx[bit 29] of extended info (x86-64 support). Does not imply PREFETCH support on non-AMD… in cpuinfo_x86_detect_isa()
261 * - AMD: ecx[bit 8] of extended info (one of 3dnow! prefetch instructions). in cpuinfo_x86_detect_isa()
262 * - Intel: ecx[bit 8] of extended info (PREFETCHW instruction only). in cpuinfo_x86_detect_isa()
263 * - AMD: edx[bit 31] of extended info (implied by 3dnow! support). Reserved bit on Intel CPUs. in cpuinfo_x86_detect_isa()
264 * - AMD: edx[bit 30] of extended info (implied by 3dnow!+ support). Reserved bit on Intel CPUs. in cpuinfo_x86_detect_isa()
265 …* - AMD: edx[bit 29] of extended info (x86-64 support). Does not imply PREFETCHW support on non-AM… in cpuinfo_x86_detect_isa()
273 …/* Assume, that 3dnow!/3dnow!+ support implies PREFETCHW support, not implications from x86-64 sup… in cpuinfo_x86_detect_isa()
280 * - Intel: ecx[bit 0] of structured feature info (ecx = 0). Reserved bit on AMD. in cpuinfo_x86_detect_isa()
287 * - Intel, AMD: edx[bit 25] in basic info. in cpuinfo_x86_detect_isa()
293 * - Intel, AMD: edx[bit 26] in basic info. in cpuinfo_x86_detect_isa()
300 * - Intel, AMD: ecx[bit 0] in basic info. in cpuinfo_x86_detect_isa()
306 * CPUs with x86-64 or SSE3 always support DAZ (denormals-as-zero) mode. in cpuinfo_x86_detect_isa()
322 * Denormals-as-zero (DAZ) flag: in cpuinfo_x86_detect_isa()
323 * - Intel, AMD: MXCSR[bit 6] in cpuinfo_x86_detect_isa()
332 * - Intel, AMD: ecx[bit 9] in basic info. in cpuinfo_x86_detect_isa()
339 * - Intel, AMD: ecx[bit 19] in basic info. in cpuinfo_x86_detect_isa()
345 * - Intel: ecx[bit 20] in basic info (reserved bit on AMD CPUs). in cpuinfo_x86_detect_isa()
351 * - AMD: ecx[bit 6] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
357 * - AMD: ecx[bit 7] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
363 * - Intel, AMD: ecx[bit 28] in basic info. in cpuinfo_x86_detect_isa()
369 * - Intel: ecx[bit 12] in basic info (reserved bit on AMD CPUs). in cpuinfo_x86_detect_isa()
375 * - AMD: ecx[bit 16] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
381 * - AMD: ecx[bit 11] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
387 * - Intel, AMD: ecx[bit 29] in basic info. in cpuinfo_x86_detect_isa()
393 * - Intel: ebx[bit 5] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
399 * - Intel: ebx[bit 16] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
405 * - Intel: ebx[bit 26] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
411 * - Intel: ebx[bit 27] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
417 * - Intel: ebx[bit 28] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
423 * - Intel: ebx[bit 17] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
429 * - Intel: ebx[bit 30] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
435 * - Intel: ebx[bit 31] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
441 * - Intel: ebx[bit 21] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
447 * - Intel: ecx[bit 1] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
453 * - Intel: ecx[bit 6] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
459 * - Intel: ecx[bit 12] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
465 * - Intel: ecx[bit 14] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
471 * - Intel: ecx[bit 11] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
477 * - Intel: edx[bit 2] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
483 * - Intel: edx[bit 3] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
489 * - Intel: edx[bit 8] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
495 * - Intel: eax[bit 5] in structured feature info (ecx = 1). in cpuinfo_x86_detect_isa()
501 * - Intel: ebx[bit 4] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
507 * - Intel: ebx[bit 11] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
513 * - Intel: either HLE or RTM is supported in cpuinfo_x86_detect_isa()
519 * - Intel: ebx[bit 14] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
526 * - Intel, AMD: edx[bit 15] in basic info. in cpuinfo_x86_detect_isa()
527 * - AMD: edx[bit 15] in extended info (zero bit on Intel CPUs). in cpuinfo_x86_detect_isa()
533 * - Intel, AMD: edx[bit 8] in basic info. in cpuinfo_x86_detect_isa()
534 * - AMD: edx[bit 8] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
541 * - Intel, AMD: ecx[bit 13] in basic info. in cpuinfo_x86_detect_isa()
547 * - Intel: ebx[bit 24] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
553 * - Intel: ecx[bit 22] in basic info. in cpuinfo_x86_detect_isa()
559 * Some early x86-64 CPUs lack LAHF & SAHF instructions. in cpuinfo_x86_detect_isa()
561 * - Intel, AMD: ecx[bit 0] in extended info. in cpuinfo_x86_detect_isa()
568 * - Intel: ebx[bit 0] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
574 * - Intel, AMD: ecx[bit 5] in extended info. in cpuinfo_x86_detect_isa()
580 * - Intel, AMD: ecx[bit 23] in basic info. in cpuinfo_x86_detect_isa()
586 * - AMD: ecx[bit 21] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
592 * - Intel, AMD: ebx[bit 3] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
598 * - Intel: ebx[bit 8] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
604 * - Intel: ebx[bit 19] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
610 * - Intel: ecx[bit 25] in basic info (reserved bit on AMD CPUs). in cpuinfo_x86_detect_isa()
616 * - Intel: ecx[bit 9] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
622 * - Intel: ecx[bit 1] in basic info (reserved bit on AMD CPUs). in cpuinfo_x86_detect_isa()
628 * - Intel: ecx[bit 10] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
634 * - Intel: ecx[bit 8] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
640 * - Intel: ecx[bit 30] in basic info (reserved bit on AMD CPUs). in cpuinfo_x86_detect_isa()
646 * - Intel: ebx[bit 18] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
652 * - Intel: ebx[bit 29] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()
665 * - VIA: edx[bit 2] in padlock info = RNG exists on chip flag. in cpuinfo_x86_detect_isa()
666 * - VIA: edx[bit 3] in padlock info = RNG enabled by OS. in cpuinfo_x86_detect_isa()
673 * - VIA: edx[bit 6] in padlock info = ACE exists on chip flag. in cpuinfo_x86_detect_isa()
674 * - VIA: edx[bit 7] in padlock info = ACE enabled by OS. in cpuinfo_x86_detect_isa()
681 * - VIA: edx[bit 8] in padlock info = ACE2 exists on chip flag. in cpuinfo_x86_detect_isa()
682 * - VIA: edx[bit 9] in padlock info = ACE 2 enabled by OS. in cpuinfo_x86_detect_isa()
689 * - VIA: edx[bit 10] in padlock info = PHE exists on chip flag. in cpuinfo_x86_detect_isa()
690 * - VIA: edx[bit 11] in padlock info = PHE enabled by OS. in cpuinfo_x86_detect_isa()
697 * - VIA: edx[bit 12] in padlock info = PMM exists on chip flag. in cpuinfo_x86_detect_isa()
698 * - VIA: edx[bit 13] in padlock info = PMM enabled by OS. in cpuinfo_x86_detect_isa()
707 * - AMD: ecx[bit 15] in extended info (reserved bit on Intel CPUs). in cpuinfo_x86_detect_isa()
713 * - Intel, AMD: edx[bit 27] in extended info. in cpuinfo_x86_detect_isa()
719 * - Intel: ecx[bit 22] in structured feature info (ecx = 0). in cpuinfo_x86_detect_isa()