186   bool IsReachable(const SUnit *SU, const SUnit *TargetSU) {  in IsReachable()
192   bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) {  in WillCreateCycle()
199   void AddPred(SUnit *SU, const SDep &D) {  in AddPred()
207   void RemovePred(SUnit *SU, const SDep &D) {  in RemovePred()
213   bool isReady(SUnit *SU) {  in isReady()
365 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) {  in ReleasePred()
525 void ScheduleDAGRRList::ReleasePredecessors(SUnit *SU) {  in ReleasePredecessors()
622 void ScheduleDAGRRList::AdvancePastStalls(SUnit *SU) {  in AdvancePastStalls()
664 void ScheduleDAGRRList::EmitNode(SUnit *SU) {  in EmitNode()
706 void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU) {  in ScheduleNodeBottomUp()
805 void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) {  in UnscheduleNodeBottomUp()
903     SUnit *SU = *I;  in RestoreHazardCheckerBottomUp()  local
913 void ScheduleDAGRRList::BacktrackBottomUp(SUnit *SU, SUnit *BtSU) {  in BacktrackBottomUp()
935 static bool isOperandOf(const SUnit *SU, SDNode *N) {  in isOperandOf()
946 SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {  in CopyAndMoveSuccessors()
1135 void ScheduleDAGRRList::InsertCopiesAndMoveSuccs(SUnit *SU, unsigned Reg,  in InsertCopiesAndMoveSuccs()
1210 static void CheckForLiveRegDef(SUnit *SU, unsigned Reg,  in CheckForLiveRegDef()
1232 static void CheckForLiveRegDefMasked(SUnit *SU, const uint32_t *RegMask,  in CheckForLiveRegDefMasked()
1259 DelayForLiveRegsBottomUp(SUnit *SU, SmallVectorImpl<unsigned> &LRegs) {  in DelayForLiveRegsBottomUp()
1338     SUnit *SU = Interferences[i-1];  in releaseInterferences()  local
1508     SUnit *SU = PickNodeToScheduleBottomUp();  in ListScheduleBottomUp()  local
1704   void remove(SUnit *SU) override {  in remove()
1797       SUnit *SU = popFromQueue(DumpQueue, DumpPicker, scheduleDAG);  in dump()  local
1839 CalcNodeSethiUllmanNumber(const SUnit *SU, std::vector<unsigned> &SUNumbers) {  in CalcNodeSethiUllmanNumber()
1873 void RegReductionPQBase::addNode(const SUnit *SU) {  in addNode()
1880 void RegReductionPQBase::updateNode(const SUnit *SU) {  in updateNode()
1992 int RegReductionPQBase::RegPressureDiff(SUnit *SU, unsigned &LiveUses) const {  in RegPressureDiff()
2031 void RegReductionPQBase::scheduledNode(SUnit *SU) {  in scheduledNode()
2099 void RegReductionPQBase::unscheduledNode(SUnit *SU) {  in unscheduledNode()
2185 static unsigned closestSucc(const SUnit *SU) {  in closestSucc()
2203 static unsigned calcMaxScratches(const SUnit *SU) {  in calcMaxScratches()
2214 static bool hasOnlyLiveInOpers(const SUnit *SU) {  in hasOnlyLiveInOpers()
2236 static bool hasOnlyLiveOutUses(const SUnit *SU) {  in hasOnlyLiveOutUses()
2264 static void initVRegCycle(SUnit *SU) {  in initVRegCycle()
2283 static void resetVRegCycle(SUnit *SU) {  in resetVRegCycle()
2300 static bool hasVRegCycleUse(const SUnit *SU) {  in hasVRegCycleUse()
2319 static bool BUHasStall(SUnit *SU, int Height, RegReductionPQBase *SPQ) {  in BUHasStall()
2511 bool hybrid_ls_rr_sort::isReady(SUnit *SU, unsigned CurCycle) const {  in isReady()
2558 bool ilp_ls_rr_sort::isReady(SUnit *SU, unsigned CurCycle) const {  in isReady()
2568 static bool canEnableCoalescing(SUnit *SU) {  in canEnableCoalescing()
2672 bool RegReductionPQBase::canClobber(const SUnit *SU, const SUnit *Op) {  in canClobber()
2693 static bool canClobberReachingPhysRegUse(const SUnit *DepSU, const SUnit *SU,  in canClobberReachingPhysRegUse()
2729 static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU,  in canClobberPhysRegDefs()