Lines Matching defs:DAG
739 const SelectionDAG &DAG, unsigned Depth) const { in computeKnownBitsForTargetNode() argument
1206 const SDLoc &dl, SelectionDAG &DAG) { in emitComparison()
1299 const SDLoc &DL, SelectionDAG &DAG) { in emitConditionalComparison()
1390 static SDValue emitConjunctionDisjunctionTreeRec(SelectionDAG &DAG, SDValue Val, in emitConjunctionDisjunctionTreeRec()
1493 static SDValue emitConjunctionDisjunctionTree(SelectionDAG &DAG, SDValue Val, in emitConjunctionDisjunctionTree()
1506 SDValue &AArch64cc, SelectionDAG &DAG, in getAArch64Cmp()
1616 getAArch64XALUOOp(AArch64CC::CondCode &CC, SDValue Op, SelectionDAG &DAG) { in getAArch64XALUOOp()
1730 SDValue AArch64TargetLowering::LowerF128Call(SDValue Op, SelectionDAG &DAG, in LowerF128Call()
1736 static SDValue LowerXOR(SDValue Op, SelectionDAG &DAG) { in LowerXOR()
1795 static SDValue LowerADDC_ADDE_SUBC_SUBE(SDValue Op, SelectionDAG &DAG) { in LowerADDC_ADDE_SUBC_SUBE()
1831 static SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) { in LowerXALUO()
1862 static SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG) { in LowerPREFETCH()
1916 static SDValue LowerVectorFP_TO_INT(SDValue Op, SelectionDAG &DAG) { in LowerVectorFP_TO_INT()
1982 static SDValue LowerVectorINT_TO_FP(SDValue Op, SelectionDAG &DAG) { in LowerVectorINT_TO_FP()
2074 static SDValue LowerBITCAST(SDValue Op, SelectionDAG &DAG) { in LowerBITCAST()
2106 static SDValue addRequiredExtensionForVectorMULL(SDValue N, SelectionDAG &DAG, in addRequiredExtensionForVectorMULL()
2123 static bool isExtendedBUILD_VECTOR(SDNode *N, SelectionDAG &DAG, in isExtendedBUILD_VECTOR()
2149 static SDValue skipExtensionForVectorMULL(SDNode *N, SelectionDAG &DAG) { in skipExtensionForVectorMULL()
2173 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended()
2181 static bool isZeroExtended(SDNode *N, SelectionDAG &DAG) { in isZeroExtended()
2189 static bool isAddSubSExt(SDNode *N, SelectionDAG &DAG) { in isAddSubSExt()
2200 static bool isAddSubZExt(SDNode *N, SelectionDAG &DAG) { in isAddSubZExt()
2211 static SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) { in LowerMUL()
2440 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { in LowerFormalArguments()
2637 SelectionDAG &DAG, in saveVarArgRegisters()
2716 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, in LowerCallResult()
2869 SelectionDAG &DAG, in addTokenForArgument()
2916 SelectionDAG &DAG = CLI.DAG; in LowerCall() local
4895 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector()
4915 static SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { in NarrowVector()
5370 static SDValue tryFormConcatFromShuffle(SDValue Op, SelectionDAG &DAG) { in tryFormConcatFromShuffle()
5402 SDValue RHS, SelectionDAG &DAG, in GeneratePerfectShuffle()
5504 SelectionDAG &DAG) { in GenerateTBL()
5883 static SDValue tryLowerToSLI(SDNode *N, SelectionDAG &DAG) { in tryLowerToSLI()
6048 SelectionDAG &DAG) { in NormalizeBuildVector()
6674 const SDLoc &dl, SelectionDAG &DAG) { in EmitVectorComparison()
7429 static SDValue foldVectorXorShiftIntoCmp(SDNode *N, SelectionDAG &DAG, in foldVectorXorShiftIntoCmp()
7453 static SDValue performIntegerAbsCombine(SDNode *N, SelectionDAG &DAG) { in performIntegerAbsCombine()
7480 static SDValue performXorCombine(SDNode *N, SelectionDAG &DAG, in performXorCombine()
7494 SelectionDAG &DAG, in BuildSDIVPow2()
7538 static SDValue performMulCombine(SDNode *N, SelectionDAG &DAG, in performMulCombine()
7598 SelectionDAG &DAG) { in performVectorCompareAndMaskUnaryOpCombine()
7643 static SDValue performIntToFpCombine(SDNode *N, SelectionDAG &DAG, in performIntToFpCombine()
7685 static SDValue performFpToIntCombine(SDNode *N, SelectionDAG &DAG, in performFpToIntCombine()
7757 static SDValue performFDivCombine(SDNode *N, SelectionDAG &DAG, in performFDivCombine()
7845 SelectionDAG &DAG = DCI.DAG; in tryCombineToEXTR() local
7886 SelectionDAG &DAG = DCI.DAG; in tryCombineToBSL() local
7933 SelectionDAG &DAG = DCI.DAG; in performORCombine() local
7950 SelectionDAG &DAG = DCI.DAG; in performSRLCombine() local
7978 SelectionDAG &DAG) { in performBitcastCombine()
8044 SelectionDAG &DAG) { in performConcatVectorsCombine()
8125 SelectionDAG &DAG) { in tryCombineFixedPointConvert()
8185 static SDValue tryExtendDUPToExtractHigh(SDValue N, SelectionDAG &DAG) { in tryExtendDUPToExtractHigh()
8317 static SDValue performSetccAddFolding(SDNode *Op, SelectionDAG &DAG) { in performSetccAddFolding()
8369 SelectionDAG &DAG) { in performAddSubLongCombine()
8418 SelectionDAG &DAG) { in tryCombineLongOpWithDup()
8445 static SDValue tryCombineShiftImm(unsigned IID, SDNode *N, SelectionDAG &DAG) { in tryCombineShiftImm()
8508 static SDValue tryCombineCRC32(unsigned Mask, SDNode *N, SelectionDAG &DAG) { in tryCombineCRC32()
8522 SelectionDAG &DAG) { in combineAcrossLanesIntrinsic()
8534 SelectionDAG &DAG = DCI.DAG; in performIntrinsicCombine() local
8589 SelectionDAG &DAG) { in performExtendCombine()
8690 static SDValue replaceSplatVectorStore(SelectionDAG &DAG, StoreSDNode *St) { in replaceSplatVectorStore()
8746 SelectionDAG &DAG, in split16BStores()
8817 SelectionDAG &DAG = DCI.DAG; in performPostLD1Combine() local
8912 SelectionDAG &DAG) { in performTBISimplification()
8927 SelectionDAG &DAG, in performSTORECombine()
8946 SelectionDAG &DAG) { in tryMatchAcrossLaneShuffleForReduction()
9071 performAcrossLaneMinMaxReductionCombine(SDNode *N, SelectionDAG &DAG, in performAcrossLaneMinMaxReductionCombine()
9170 performAcrossLaneAddReductionCombine(SDNode *N, SelectionDAG &DAG, in performAcrossLaneAddReductionCombine()
9204 SelectionDAG &DAG) { in performNEONPostLDSTCombine()
9517 SelectionDAG &DAG, unsigned CCIndex, in performCONDCombine()
9591 SelectionDAG &DAG) { in performBRCONDCombine()
9649 SelectionDAG &DAG) { in getTestBitOperand()
9717 SelectionDAG &DAG) { in performTBZCombine()
9746 static SDValue performVSelectCombine(SDNode *N, SelectionDAG &DAG) { in performVSelectCombine()
9777 SelectionDAG &DAG = DCI.DAG; in performSelectCombine() local
9845 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine() local
10054 SelectionDAG &DAG) { in ReplaceBITCASTResults()
10072 SelectionDAG &DAG, unsigned InterOp, in ReplaceReductionResults()
10086 SelectionDAG &DAG) { in ReplaceCMP_SWAP_128Results()