Lines Matching full:x86
1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
45 case X86::reloc_riprel_4byte: in getFixupKindLog2Size()
46 case X86::reloc_riprel_4byte_relax: in getFixupKindLog2Size()
47 case X86::reloc_riprel_4byte_relax_rex: in getFixupKindLog2Size()
48 case X86::reloc_riprel_4byte_movq_load: in getFixupKindLog2Size()
49 case X86::reloc_signed_4byte: in getFixupKindLog2Size()
50 case X86::reloc_signed_4byte_relax: in getFixupKindLog2Size()
51 case X86::reloc_global_offset_table: in getFixupKindLog2Size()
58 case X86::reloc_global_offset_table8: in getFixupKindLog2Size()
88 return X86::NumTargetFixupKinds; in getNumFixupKinds()
92 const static MCFixupKindInfo Infos[X86::NumTargetFixupKinds] = { in getFixupKindInfo()
147 case X86::JAE_1: in getRelaxedOpcodeBranch()
148 return (is16BitMode) ? X86::JAE_2 : X86::JAE_4; in getRelaxedOpcodeBranch()
149 case X86::JA_1: in getRelaxedOpcodeBranch()
150 return (is16BitMode) ? X86::JA_2 : X86::JA_4; in getRelaxedOpcodeBranch()
151 case X86::JBE_1: in getRelaxedOpcodeBranch()
152 return (is16BitMode) ? X86::JBE_2 : X86::JBE_4; in getRelaxedOpcodeBranch()
153 case X86::JB_1: in getRelaxedOpcodeBranch()
154 return (is16BitMode) ? X86::JB_2 : X86::JB_4; in getRelaxedOpcodeBranch()
155 case X86::JE_1: in getRelaxedOpcodeBranch()
156 return (is16BitMode) ? X86::JE_2 : X86::JE_4; in getRelaxedOpcodeBranch()
157 case X86::JGE_1: in getRelaxedOpcodeBranch()
158 return (is16BitMode) ? X86::JGE_2 : X86::JGE_4; in getRelaxedOpcodeBranch()
159 case X86::JG_1: in getRelaxedOpcodeBranch()
160 return (is16BitMode) ? X86::JG_2 : X86::JG_4; in getRelaxedOpcodeBranch()
161 case X86::JLE_1: in getRelaxedOpcodeBranch()
162 return (is16BitMode) ? X86::JLE_2 : X86::JLE_4; in getRelaxedOpcodeBranch()
163 case X86::JL_1: in getRelaxedOpcodeBranch()
164 return (is16BitMode) ? X86::JL_2 : X86::JL_4; in getRelaxedOpcodeBranch()
165 case X86::JMP_1: in getRelaxedOpcodeBranch()
166 return (is16BitMode) ? X86::JMP_2 : X86::JMP_4; in getRelaxedOpcodeBranch()
167 case X86::JNE_1: in getRelaxedOpcodeBranch()
168 return (is16BitMode) ? X86::JNE_2 : X86::JNE_4; in getRelaxedOpcodeBranch()
169 case X86::JNO_1: in getRelaxedOpcodeBranch()
170 return (is16BitMode) ? X86::JNO_2 : X86::JNO_4; in getRelaxedOpcodeBranch()
171 case X86::JNP_1: in getRelaxedOpcodeBranch()
172 return (is16BitMode) ? X86::JNP_2 : X86::JNP_4; in getRelaxedOpcodeBranch()
173 case X86::JNS_1: in getRelaxedOpcodeBranch()
174 return (is16BitMode) ? X86::JNS_2 : X86::JNS_4; in getRelaxedOpcodeBranch()
175 case X86::JO_1: in getRelaxedOpcodeBranch()
176 return (is16BitMode) ? X86::JO_2 : X86::JO_4; in getRelaxedOpcodeBranch()
177 case X86::JP_1: in getRelaxedOpcodeBranch()
178 return (is16BitMode) ? X86::JP_2 : X86::JP_4; in getRelaxedOpcodeBranch()
179 case X86::JS_1: in getRelaxedOpcodeBranch()
180 return (is16BitMode) ? X86::JS_2 : X86::JS_4; in getRelaxedOpcodeBranch()
191 case X86::IMUL16rri8: return X86::IMUL16rri; in getRelaxedOpcodeArith()
192 case X86::IMUL16rmi8: return X86::IMUL16rmi; in getRelaxedOpcodeArith()
193 case X86::IMUL32rri8: return X86::IMUL32rri; in getRelaxedOpcodeArith()
194 case X86::IMUL32rmi8: return X86::IMUL32rmi; in getRelaxedOpcodeArith()
195 case X86::IMUL64rri8: return X86::IMUL64rri32; in getRelaxedOpcodeArith()
196 case X86::IMUL64rmi8: return X86::IMUL64rmi32; in getRelaxedOpcodeArith()
199 case X86::AND16ri8: return X86::AND16ri; in getRelaxedOpcodeArith()
200 case X86::AND16mi8: return X86::AND16mi; in getRelaxedOpcodeArith()
201 case X86::AND32ri8: return X86::AND32ri; in getRelaxedOpcodeArith()
202 case X86::AND32mi8: return X86::AND32mi; in getRelaxedOpcodeArith()
203 case X86::AND64ri8: return X86::AND64ri32; in getRelaxedOpcodeArith()
204 case X86::AND64mi8: return X86::AND64mi32; in getRelaxedOpcodeArith()
207 case X86::OR16ri8: return X86::OR16ri; in getRelaxedOpcodeArith()
208 case X86::OR16mi8: return X86::OR16mi; in getRelaxedOpcodeArith()
209 case X86::OR32ri8: return X86::OR32ri; in getRelaxedOpcodeArith()
210 case X86::OR32mi8: return X86::OR32mi; in getRelaxedOpcodeArith()
211 case X86::OR64ri8: return X86::OR64ri32; in getRelaxedOpcodeArith()
212 case X86::OR64mi8: return X86::OR64mi32; in getRelaxedOpcodeArith()
215 case X86::XOR16ri8: return X86::XOR16ri; in getRelaxedOpcodeArith()
216 case X86::XOR16mi8: return X86::XOR16mi; in getRelaxedOpcodeArith()
217 case X86::XOR32ri8: return X86::XOR32ri; in getRelaxedOpcodeArith()
218 case X86::XOR32mi8: return X86::XOR32mi; in getRelaxedOpcodeArith()
219 case X86::XOR64ri8: return X86::XOR64ri32; in getRelaxedOpcodeArith()
220 case X86::XOR64mi8: return X86::XOR64mi32; in getRelaxedOpcodeArith()
223 case X86::ADD16ri8: return X86::ADD16ri; in getRelaxedOpcodeArith()
224 case X86::ADD16mi8: return X86::ADD16mi; in getRelaxedOpcodeArith()
225 case X86::ADD32ri8: return X86::ADD32ri; in getRelaxedOpcodeArith()
226 case X86::ADD32mi8: return X86::ADD32mi; in getRelaxedOpcodeArith()
227 case X86::ADD64ri8: return X86::ADD64ri32; in getRelaxedOpcodeArith()
228 case X86::ADD64mi8: return X86::ADD64mi32; in getRelaxedOpcodeArith()
231 case X86::ADC16ri8: return X86::ADC16ri; in getRelaxedOpcodeArith()
232 case X86::ADC16mi8: return X86::ADC16mi; in getRelaxedOpcodeArith()
233 case X86::ADC32ri8: return X86::ADC32ri; in getRelaxedOpcodeArith()
234 case X86::ADC32mi8: return X86::ADC32mi; in getRelaxedOpcodeArith()
235 case X86::ADC64ri8: return X86::ADC64ri32; in getRelaxedOpcodeArith()
236 case X86::ADC64mi8: return X86::ADC64mi32; in getRelaxedOpcodeArith()
239 case X86::SUB16ri8: return X86::SUB16ri; in getRelaxedOpcodeArith()
240 case X86::SUB16mi8: return X86::SUB16mi; in getRelaxedOpcodeArith()
241 case X86::SUB32ri8: return X86::SUB32ri; in getRelaxedOpcodeArith()
242 case X86::SUB32mi8: return X86::SUB32mi; in getRelaxedOpcodeArith()
243 case X86::SUB64ri8: return X86::SUB64ri32; in getRelaxedOpcodeArith()
244 case X86::SUB64mi8: return X86::SUB64mi32; in getRelaxedOpcodeArith()
247 case X86::SBB16ri8: return X86::SBB16ri; in getRelaxedOpcodeArith()
248 case X86::SBB16mi8: return X86::SBB16mi; in getRelaxedOpcodeArith()
249 case X86::SBB32ri8: return X86::SBB32ri; in getRelaxedOpcodeArith()
250 case X86::SBB32mi8: return X86::SBB32mi; in getRelaxedOpcodeArith()
251 case X86::SBB64ri8: return X86::SBB64ri32; in getRelaxedOpcodeArith()
252 case X86::SBB64mi8: return X86::SBB64mi32; in getRelaxedOpcodeArith()
255 case X86::CMP16ri8: return X86::CMP16ri; in getRelaxedOpcodeArith()
256 case X86::CMP16mi8: return X86::CMP16mi; in getRelaxedOpcodeArith()
257 case X86::CMP32ri8: return X86::CMP32ri; in getRelaxedOpcodeArith()
258 case X86::CMP32mi8: return X86::CMP32mi; in getRelaxedOpcodeArith()
259 case X86::CMP64ri8: return X86::CMP64ri32; in getRelaxedOpcodeArith()
260 case X86::CMP64mi8: return X86::CMP64mi32; in getRelaxedOpcodeArith()
263 case X86::PUSH32i8: return X86::PUSHi32; in getRelaxedOpcodeArith()
264 case X86::PUSH16i8: return X86::PUSHi16; in getRelaxedOpcodeArith()
265 case X86::PUSH64i8: return X86::PUSH64i32; in getRelaxedOpcodeArith()
308 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel. in relaxInstruction()
309 bool is16BitMode = STI.getFeatureBits()[X86::Mode16Bit]; in relaxInstruction()
493 case X86::EBX: in PushInstrSize()
494 case X86::ECX: in PushInstrSize()
495 case X86::EDX: in PushInstrSize()
496 case X86::EDI: in PushInstrSize()
497 case X86::ESI: in PushInstrSize()
498 case X86::EBP: in PushInstrSize()
499 case X86::RBX: in PushInstrSize()
500 case X86::RBP: in PushInstrSize()
502 case X86::R12: in PushInstrSize()
503 case X86::R13: in PushInstrSize()
504 case X86::R14: in PushInstrSize()
505 case X86::R15: in PushInstrSize()
550 (Is64Bit ? X86::RBP : X86::EBP) && "Invalid frame pointer!"); in generateCompactUnwindEncodingImpl()
679 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0 in getCompactUnwindRegNum()
682 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCompactUnwindRegNum()