2566                                   unsigned Opc, bool AllowSP, unsigned &NewSrc,  in classifyLEAReg()
2649   unsigned Opc, leaInReg;  in convertToThreeAddressWithLEA()  local
2800     unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r;  in convertToThreeAddress()  local
2844     unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r  in convertToThreeAddress()  local
2877     unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r  in convertToThreeAddress()  local
2913     unsigned Opc;  in convertToThreeAddress()  local
2988     unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r;  in convertToThreeAddress()  local
3203     unsigned Opc;  in commuteInstructionImpl()  local
3335     unsigned Opc;  in commuteInstructionImpl()  local
3394       unsigned Opc = getFMA3OpcodeToCommuteOperands(MI, OpIdx1, OpIdx2);  in commuteInstructionImpl()  local
3469   unsigned Opc = MI.getOpcode();  in getFMA3OpcodeToCommuteOperands()  local
3709 static X86::CondCode getCondFromSETOpc(unsigned Opc) {  in getCondFromSETOpc()
3732 X86::CondCode X86::getCondFromCMovOpc(unsigned Opc) {  in getCondFromCMovOpc()
3855   static const uint16_t Opc[16][2] = {  in getSETFromCond()  local
3882   static const uint16_t Opc[32][3] = {  in getCMovFromCond()  local
4263     unsigned Opc = GetCondBranchFromCond(CC);  in InsertBranch()  local
4320   unsigned Opc = getCMovFromCond((X86::CondCode)Cond[0].getImm(),  in insertSelect()  local
4422     if (auto Opc = copyPhysRegOpcode_AVX512_DQ(DestReg, SrcReg))  in copyPhysRegOpcode_AVX512()  local
4425     if (auto Opc = copyPhysRegOpcode_AVX512_BW(DestReg, SrcReg))  in copyPhysRegOpcode_AVX512()  local
4454   unsigned Opc = 0;  in copyPhysReg()  local
4767   unsigned Opc = getStoreRegOpcode(SrcReg, RC, isAligned, Subtarget);  in storeRegToStackSlot()  local
4783   unsigned Opc = getStoreRegOpcode(SrcReg, RC, isAligned, Subtarget);  in storeRegToAddr()  local
4804   unsigned Opc = getLoadRegOpcode(DestReg, RC, isAligned, Subtarget);  in loadRegFromStackSlot()  local
4818   unsigned Opc = getLoadRegOpcode(DestReg, RC, isAligned, Subtarget);  in loadRegFromAddr()  local
6087     unsigned Opc = Subtarget.hasAVX() ? X86::VXORPSrr : X86::XORPSrr;  in breakPartialRegDependency()  local
6168   unsigned Opc = LoadMI.getOpcode();  in isNonFoldablePartialRegisterLoad()  local
6323     unsigned Opc = LoadMI.getOpcode();  in foldMemoryOperandImpl()  local
6370   unsigned Opc = I->second.first;  in unfoldMemoryOperand()  local
6492   unsigned Opc = I->second.first;  in unfoldMemoryOperand()  local
6592 unsigned X86InstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc,  in getOpcodeAfterMemoryUnfold()