Lines Matching full:arm

1 …le=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM --check-prefix=ARM-MACHO
2 …=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM --check-prefix=ARM-ELF
4 …long-calls -verify-machineinstrs | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-MA…
5 …long-calls -verify-machineinstrs | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-ELF
16 ; ARM-LABEL: t1:
17 ; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}}
18 ; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
19 ; ARM: add r0, r0, #5
20 ; ARM: movw r1, #64
21 ; ARM: movw r2, #10
22 ; ARM: and r1, r1, #255
23 ; ARM: bl {{_?}}memset
24 ; ARM-LONG-LABEL: t1:
26 ; ARM-LONG-MACHO: {{(movw r3, :lower16:L_memset\$non_lazy_ptr)|(ldr r3, .LCPI)}}
27 ; ARM-LONG-MACHO: {{(movt r3, :upper16:L_memset\$non_lazy_ptr)?}}
28 ; ARM-LONG-MACHO: ldr r3, [r3]
30 ; ARM-LONG-ELF: movw r3, :lower16:memset
31 ; ARM-LONG-ELF: movt r3, :upper16:memset
33 ; ARM-LONG: blx r3
54 ; ARM-LABEL: t2:
56 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
57 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
58 ; ARM-MACHO: ldr r0, [r0]
60 ; ARM-ELF: movw r0, :lower16:temp
61 ; ARM-ELF: movt r0, :upper16:temp
63 ; ARM: add r1, r0, #4
64 ; ARM: add r0, r0, #16
65 ; ARM: movw r2, #17
66 ; ARM: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
67 ; ARM: mov r0, r1
68 ; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
69 ; ARM: bl {{_?}}memcpy
70 ; ARM-LONG-LABEL: t2:
72 ; ARM-LONG-MACHO: {{(movw r3, :lower16:L_memcpy\$non_lazy_ptr)|(ldr r3, .LCPI)}}
73 ; ARM-LONG-MACHO: {{(movt r3, :upper16:L_memcpy\$non_lazy_ptr)?}}
74 ; ARM-LONG-MACHO: ldr r3, [r3]
76 ; ARM-LONG-ELF: movw r3, :lower16:memcpy
77 ; ARM-LONG-ELF: movt r3, :upper16:memcpy
79 ; ARM-LONG: blx r3
103 ; ARM-LABEL: t3:
105 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
106 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
107 ; ARM-MACHO: ldr r0, [r0]
109 ; ARM-ELF: movw r0, :lower16:temp
110 ; ARM-ELF: movt r0, :upper16:temp
113 ; ARM: add r1, r0, #4
114 ; ARM: add r0, r0, #16
115 ; ARM: movw r2, #10
116 ; ARM: mov r0, r1
117 ; ARM: bl {{_?}}memmove
118 ; ARM-LONG-LABEL: t3:
120 ; ARM-LONG-MACHO: {{(movw r3, :lower16:L_memmove\$non_lazy_ptr)|(ldr r3, .LCPI)}}
121 ; ARM-LONG-MACHO: {{(movt r3, :upper16:L_memmove\$non_lazy_ptr)?}}
122 ; ARM-LONG-MACHO: ldr r3, [r3]
124 ; ARM-LONG-ELF: movw r3, :lower16:memmove
125 ; ARM-LONG-ELF: movt r3, :upper16:memmove
127 ; ARM-LONG: blx r3
149 ; ARM-LABEL: t4:
151 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
152 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
153 ; ARM-MACHO: ldr r0, [r0]
155 ; ARM-ELF: movw r0, :lower16:temp
156 ; ARM-ELF: movt r0, :upper16:temp
158 ; ARM: ldr r1, [r0, #16]
159 ; ARM: str r1, [r0, #4]
160 ; ARM: ldr r1, [r0, #20]
161 ; ARM: str r1, [r0, #8]
162 ; ARM: ldrh r1, [r0, #24]
163 ; ARM: strh r1, [r0, #12]
164 ; ARM: bx lr
183 ; ARM-LABEL: t5:
185 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
186 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
187 ; ARM-MACHO: ldr r0, [r0]
189 ; ARM-ELF: movw r0, :lower16:temp
190 ; ARM-ELF: movt r0, :upper16:temp
192 ; ARM: ldrh r1, [r0, #16]
193 ; ARM: strh r1, [r0, #4]
194 ; ARM: ldrh r1, [r0, #18]
195 ; ARM: strh r1, [r0, #6]
196 ; ARM: ldrh r1, [r0, #20]
197 ; ARM: strh r1, [r0, #8]
198 ; ARM: ldrh r1, [r0, #22]
199 ; ARM: strh r1, [r0, #10]
200 ; ARM: ldrh r1, [r0, #24]
201 ; ARM: strh r1, [r0, #12]
202 ; ARM: bx lr
223 ; ARM-LABEL: t6:
225 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
226 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
227 ; ARM-MACHO: ldr r0, [r0]
229 ; ARM-ELF: movw r0, :lower16:temp
230 ; ARM-ELF: movt r0, :upper16:temp
232 ; ARM: ldrb r1, [r0, #16]
233 ; ARM: strb r1, [r0, #4]
234 ; ARM: ldrb r1, [r0, #17]
235 ; ARM: strb r1, [r0, #5]
236 ; ARM: ldrb r1, [r0, #18]
237 ; ARM: strb r1, [r0, #6]
238 ; ARM: ldrb r1, [r0, #19]
239 ; ARM: strb r1, [r0, #7]
240 ; ARM: ldrb r1, [r0, #20]
241 ; ARM: strb r1, [r0, #8]
242 ; ARM: ldrb r1, [r0, #21]
243 ; ARM: strb r1, [r0, #9]
244 ; ARM: ldrb r1, [r0, #22]
245 ; ARM: strb r1, [r0, #10]
246 ; ARM: ldrb r1, [r0, #23]
247 ; ARM: strb r1, [r0, #11]
248 ; ARM: ldrb r1, [r0, #24]
249 ; ARM: strb r1, [r0, #12]
250 ; ARM: ldrb r1, [r0, #25]
251 ; ARM: strb r1, [r0, #13]
252 ; ARM: bx lr
291 ; ARM-LABEL: t8:
292 ; ARM-NOT: FastISel missed call:   %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)