Lines Matching refs:O32
1 ; RUN: llc -march=mips -relocation-model=static < %s | FileCheck --check-prefixes=ALL,SYM32,O32,O32…
2 ; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck --check-prefixes=ALL,SYM32,O32,O…
4 …=mips64 -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,SYM32,O32 %s
5 …ips64el -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,SYM32,O32 %s
19 ; On O32, varargs prevents all FPU argument register usage. This contradicts
47 ; O32 forbids using floating point registers for the non-variable portion.
53 ; O32-DAG: sdc1 [[FTMP1]], 8([[R2]])
57 ; O32-DAG: sw $6, 16($sp)
58 ; O32-DAG: sw $7, 20($sp)
68 ; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and 8 bytes reserved
71 ; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 16
72 ; O32-DAG: sw [[VAPTR]], 4($sp)
81 ; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 8
82 ; O32-DAG: sw [[VAPTR]], 4($sp)
87 ; O32-DAG: ldc1 [[FTMP1:\$f[0-9]+]], 16($sp)
112 ; The first four arguments are the same in O32/N32/N64.
114 ; O32-DAG: sw $4, 4([[R2]])
118 ; O32-DAG: sw $5, 12($sp)
119 ; O32-DAG: sw $6, 16($sp)
120 ; O32-DAG: sw $7, 20($sp)
130 ; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and should have 8
135 ; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 12
136 ; O32-DAG: sw [[VAPTR]], 4($sp)
148 ; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 4
149 ; O32-DAG: sw [[VAPTR]], 4($sp)
154 ; O32-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 12($sp)