Lines Matching refs:Inst0
709 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
715 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 ", " #Src0 \ in TEST_F()
725 __ Inst0(IceType_i##Size, Encoded_GPR_##Dst0(), Encoded_GPR_##Src0()); \ in TEST_F()
740 #define TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size) \ in TEST_F() argument
745 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
755 __ Inst0(IceType_i##Size, Encoded_GPR_##Dst0(), dwordAddress(T0)); \ in TEST_F()
772 #define TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Imm, Op, Size) \ in TEST_F() argument
777 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
783 __ Inst0(IceType_i##Size, Encoded_GPR_##Dst0(), \ in TEST_F()
800 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
805 "(" #Inst0 ", " #Inst1 ", Addr, " #Value0 ", " #Src0 ", " #Src1 \ in TEST_F()
815 __ Inst0(IceType_i##Size, dwordAddress(T0), Encoded_GPR_##Src0()); \ in TEST_F()
832 #define TestImplAddrImm(Inst0, Inst1, Value0, Imm, Op, Size) \ in TEST_F() argument
837 "(" #Inst0 ", " #Inst1 ", Addr, " #Value0 ", Imm(" #Imm "), " #Op \ in TEST_F()
843 __ Inst0(IceType_i##Size, dwordAddress(T0), \ in TEST_F()
862 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
865 TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F()
867 TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \ in TEST_F()
868 TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \ in TEST_F()
869 TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size); \ in TEST_F()
870 TestImplAddrImm(Inst0, Inst1, Value0, Value1, Op, Size); \ in TEST_F()