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T`B?`VH 7*`RH@7**OB @{è#_h:C!`RH6!`VH6! !Ru +R rThRH6!!`RH*!`RH!Rt +R rTt +R rTt:C ȓT`B?֪`@,`= @@H@+_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$_$;$$$$HXttttttttttttttttttt$tttt0tttttt<h@dDLink is not up, try count: %d, linksts: %s(0x%x)3Can't map PCIe SysMMU table! pcie_wq## register pcie connection function couldn't create device file for test(%d) %s:[hot reset] by pulsing app_init_rst(ch %d) complete_timeout_irqsFailed to parse the number of pmu-offset use-sicd3trsv_reg3B4 [0x0ED0]: %#x 6PCIe DBI access Fail... 6PCIe EP Outbound mem access Success. 3PHY 0x0FC0: 0x%08x LTSSM_H: 0x%08x CFG LANENUM WAITPCIE idle ip index : %d Invalid use-pcieon-sleep value(set to default->false) PCIe L1SS(L1.2) is ENABLED. in cpl recovery3trsv_reg38B [0x0E2C]: %#x PCIe UNIT test FAIL[6/6]!!! 6%s: PCIe link is not up exynos_pcie_rc_set_outbound_atu3PCIe: User of event deregistration is NULL Current Link Speed is GEN%d (MAX GEN%d)Xmit OFF sentEOM2NULL Invalid use-cache-coherency value(Set to default->false) ## PCIe don't use SICD SYSREG is not defined. check irq22 pending clear: irq2_state = 0x%x 3cmn_reg0FC [0x03F0]: %#x PCIe on sleep resume... Current Link Speed is GEN%d (MAX GEN%d) ## PCIe ch %d ## pcie_rc_testlink_speedEP device type is NOT defined, device type is 'EP_NO_DEVICE(0)' use-iacannot get perst_gpio Physical Layer 16GT/s3%s ch%d: +++ 3cmn_reg17F [0x05FC]: %#x 3trsv_reg39F [0x0E7C]: %#x Dis6PCIe Link test Fail... 6PCIe link Recovery test Success. 3[Print SUB_CTRL region] end poweroff, state: %d pm_resume api calledget_sudden_linkdown state=%dEvent 0x%x is registered for RC %d HOT RESET(phy+0xC08=0x%x)(phy+0x1408=0x%x)(phy+0xC6C=0x%x)(phy+0x146C=0x%x)>>>> PCIe Test <<<< L1.2 Disable....on PCIe_ch%d Failed to parse the number of pcie clock activedbi3Can't find PCIe poweron function 3PHY 0x17C0 : 0x%08x exynos_pcie_rc_poweronpcie link up failL123 SEND EIDLEMSI memory is allocated over 32bit boundary cannot receive ack message from EP&exynos_pcie->power_onoff_lock%scouldn't create device file for power_stats(%d) eom1separated-msiCan't get pcie pinctrl!!! Initialize PCIe function. L1 PM SubstatesFailed to set DMA mask to 32-bit.3trsv_reg39E [0x0E78]: %#x 3trsv_reg396 [0x0E58]: %#x 3trsv_reg3B5 [0x0ED4]: %#x TEST PCIe %sLink Test 6PCIe Link Recovery test Fail... PCIE link state is %d %s: Failed MSI initialization(%d) 3%s: cannot change to L0(LTSSM = 0x%x, cnt = %d) 6PCIe Ch%d MSI%d vector is registered! POLL CONFIGPRE DETECT QUIET3DMA map - Can't map PCIe SysMMU table!!! Unexpected separated MSI2 interrupt!## PCIe RC PROBE start PCIe %d: probe donePCIe establish link test failed (%d) PM_POWER_STATE = 0x%08x LTSSM: 0x%08x, PM_STATE = 0x%08x Value needs to be <= %d %d separated MSI irq is defined. !! PCIE_CPL_TIMEOUT-irq2_state: 0x%x !!start cpl recovery%s: pcie int_min_lock = %d6[%s] pcie_is_linkup : %d OC Fail: PLL_LOCK:%d, CDR_LOCK:%d, OC:%d POLL COMPLIANCERCVRY RCVRCFGL0spma regs are not valid, restore skipped &exynos_pcie->conf_lockeom_result structure is NULL !!! L1.2 Enable....on PCIe_ch%d Unset separated-msi value, default '0' falsePCIe DYNAMIC PHY ISOLATION is Disabled. can't find wlan pin info. Need to check EP device pwr pin ## make gpio set high LTSSM: 0x%02x, L1sub: 0x%x, D state: 0x%x 3PCS 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x start force Link down S/W recovery start poweron, state: %dpcie clk enable, ret value = %d%s: Set PERST to LOW, gpio val = %dRCVRY IDLEexynos-pcie-msi3eom_result structure is NULL!! parse the number of lanes: %d ## PCIe don't use MSI PCIe L1SS(L1.2) is DISABLED. use-phy-isol-engpiosDevice Serial Number1. Test PCIe LINK... 3DBI 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x DMA_MONITOR3: 0x%08x start poweroff, state: %d%s, pcie_is_linkup 0couldn't create workqueue link_up_averageInvalid use-msi value(Set to default->true) PCIe NCLKOFF is DISABLED. elbifailed to get irq restore enable cnt = %d can't find ssd pin info. Need to check EP device power pin PCIe UNIT test FAIL[2/6]!!! PCIe UNIT test FAIL[3/6]!!! 6%s: PCIE_ATU_CR2_OUTBOUND2(0x404) = 0x%x Link Speed Changed: from GEN%d to GEN%d ### PMU PHY Isolation : 0x%x PLL_LOCK:%d, CDR_LOCK:%d, OC:%dUnexpected separated MSI3 interrupt!&exynos_pcie->reg_lock&exynos_pcie->s2mpu_refcnt_lockcouldn't create device file for eom(%d) l12_stateuse-nclkoff-en3trsv_reg39D [0x0E74]: %#x 3trsv_reg392 [0x0E48]: %#x 3trsv_reg39C [0x0E70]: %#x 3trsv_reg3B3 [0x0ECC]: %#x 3Can't find PCIe read own configuration function 6PCIe EP conf access Fail... 6%s: --- 6%s: PCIE_ATU_UPPER_TARGET_OUTBOUND2(0x418) = 0x%x PCIE_MSI_ADDR_HI: 0x%x call PCIE_CPL_TIMEOUT callback (%s) Current link speed(0x80): GEN%d D state: %x, LTSSM: %xDETECT QUIETDETECT ACT%s: msi_addr_from_dt is null Unexpected separated MSI0 interrupt!Unexpected separated MSI1 interrupt!PCIe %d: probe failednum-lanespcie,wlan-gpioPCI Express(irq0 = 0x%x, irq1 = 0x%x, irq2 = 0x%x) 3trsv_reg36F [0x0DBC]: %#x 3trsv_reg395 [0x0E54]: %#x Default must_resume value : %d exynos_pcie_rc_cpl_timeout_workFailed to save pcie state Check unexpected state - H/W:0x%x, S/W:%d DISABLEDexynos-pcie-msi1Failed to create pcie sys file ## %s: PCIe probe success 1 : Link Test Change Link Speed: Target Link Speed = GEN%d link_recovery_failures%s: pcie int_min_lock = %d Virtual Channel Capability3trsv_reg3B7 [0x0EDC]: %#x 6PCIe DBI access Success. 3Can't find PCIe write other configuration function 6PCIe EP conf access Success. 6%s: PCIE_ATU_UPPER_BASE_OUTBOUND2(0x40C) = 0x%x PCIE_IRQ2_EN: 0x%x 3[Print DBI region] 3%s: --- start linkdown recovery%s: Failed MSI initialization(%d)end poweron, state: %d exynos_pcie_rc_poweroffexynos_pcie_rc_set_sudden_linkdown_stateL2 IDLEL2 _WAKE Unknown state..!! %s: force perst setting Version: 1 downuse-msiuse-l1ssInvalid use-nclkoff_en value(set to default -> false) 2. Test DBI access... 3%s: EP is not EP_BCM_WIFI (not support l1_exit) 3PCIe: did not find RC for pci endpoint device 3failed to request MSI%d irq pcie_linkup_statstatus %#x passed cnt=%dch-num%10dInvalid use-phy-isol-en value(set to default -> false) samsung,syscon-phandleFailed to get pcie clock 3cmn_reg1D8 [0x0760]: %#x 6%s: After set perst, gpio val = %d 3PHY 0x760 : %#08x, 0x764 : %#08x resumed_phydown3%s: 'use_l1ss' is false in DT(not support L1.2) 3PCIe: Event deregistration is NULL skip register dump(ip_ver = 0x%x) POLL ACTIVEelapsed time: %lld uS%s, pcie link is not up exynos_pcie_rc_probe(work_completion)(&(&exynos_pcie->dislink_work)->work)## %s: PCIe probe failed Unsupported Test Number(%d)... link_statelink_down_irqstrue## PCIe use PCIE ON Sleep pcs3. Test EP configuration access... exynos_pcie_rc_register_dump3ELBI 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x Invalid target speed: Unable to change exynos_pcie_rc_set_affinityCFG LANENUM ACEPTCFG IDLEdiff i=%d curr_val=0x%08x save_val=0x%08x exynos-pcie-rcip-verFailed to parse the number of ip-ver max-link-speedMAX Link Speed is NOT defined...(GEN1) PCIe SysMMU is ENABLED. 3trsv_reg36D [0x0DB4]: %#x 3trsv_reg393 [0x0E4C]: %#x 3trsv_reg398 [0x0E60]: %#x 3offset: 0x0 0x4 0x8 0xC RCVRY LOCKL1 IDLE Current PM state(PCS + 0x188) : 0x%xreceived Enter_L23_READY DLLP packet%d link_up_failuresFailed to parse the # of lanes, default '1' iaPCIe ext cap [0x%x][%s]: 0x%x Unknown id ..!!MSI: separated msi & pcieonsleep 3trsv_reg399 [0x0E64]: %#x 3trsv_reg3B8 [0x0EE0]: %#x PCIe on sleep... suspend IRQ0 0x%x 6PCIe EP Outbound mem access Fail... 6%s: PCIE_ATU_LOWER_BASE_OUTBOUND2(0x408) = 0x%x Failed to get pci deviceEvent is deregistered for RC %d Force PCIe poweroff --> poweron LPBK EXITexynos_pcie_rc_msi_init## PCIe dis-link test ## GEN%d Value needs to be between 1-3 use-pcieon-sleepPCIe Secure ATU is ENABLED. pcie,ssd-gpioCan't set pcie clkerq to output high! No idle pin state(but it's OK)!! phy3trsv_reg379 [0x0DE4]: %#x remove enable cnt to fake enable = %d 6PCIe link Down test Success. already in linkdown recoveryexynos_pcie_rc_l1ss_ctrl6[%s] Not support I/A(use_ia = false) %s: Link is up. But not max speed, try count: %d exynos_pcie_rc_storephy-clk-numMSI is ENABLED. pm_suspend_no_irq calledLTSSM: 0x%08x DMA_MONITOR1: 0x%08x DMA_MONITOR2: 0x%08x 3set cpl_timeout_recovery to %d for ch_num:%d Already GEN%d(current), target: GEN%d Unexpected separated MSI4 interrupt!invalid ch_num=%d for logbuffer registry couldn't create device file for linkst(%d) couldn't create sysfs group for link_stats(%d) PCIe dis-link test failed (%d) Link %s: Cumulative count: 0x%llx Cumulative duration msec: 0x%llx Last entry timestamp msec: 0x%llx Cache Coherency unit is ENABLED. PCIe SysMMU is DISABLED. Invalid use-sysmmu value(set to default->false) Invalid use-secure-atu value(default=false) ssd gpio is not defined -> don't use ssd through pcie#%d Power Managementfailed to dw pcie host init ! PCIE LINK DOWN-irq1_state: 0x%x !3trsv_reg383 [0x0E0C]: %#x IRQ2 0x%x 6PCIe link test Success. 6[%s] ch_num:%d 6%s: target_addr = 0x%x, offset = 0x%x, size = 0x%x %s, pcie_is_linkup 0 Link is not up CFG LINKWD STARTCFG LINKWD ACEPTRCVRY SPEED2 : DisLink Test PCIe UNIT test failed (%d) PCIe establish link test success Value needs to be 0 or 1 use-secure-atuMessage Signalled Interrupts Unknown id..!!Advanced Error ReportingPower Budgetingfailed to request irq 3trsv_reg397 [0x0E5C]: %#x 3trsv_reg39B [0x0E6C]: %#x 3Can't find PCIe write own configuration function exynos_pcie_set_ready_cto_recoveryPCIE_MSI_INTR0_MASK(0x%x):0x%x link down and recovery cnt: %d 3%s: ch#%d PCIe device is not loaded 3Warning: exynos_pcie_rc_set_enable_wake: not exist pp Phy isolation val=%dPMA Info : 0x760(0x%x), 0xE0C(0x%x), 0x3F0(0x%x), 0xFC0(0x%x)L0DISABLED IDLELPBK ENTRY link state:%xcannot receive L23_READY DLLP packet(0x%x)PCI sleep hook failed &exynos_pcie->power_stats_lockcouldn't create device file for l12_state(%d) ## PCIe UNIT test START ## ## PCIe establish link test ## PCIe DYNAMIC PHY ISOLATION is Enabled. exynos_pcie_rc_parse_dtsyscon regmap lookup failed. exynos-pcie3trsv_reg39A [0x0E68]: %#x 4. Test EP Outbound memory region... PCIE_MSI_ADDR_LO: 0x%x PCIE_MSI_INTR0_STATUS: 0x%x exynos_pcie_rc_chk_link_status3PCIe: Event registration is NULL OC Fail after soft power reset!DISABLED ENTRYLPBK ACTIVE%s(0x%x)can't get num of lanes!! link_statspll_lock_average## PCIe use SICD use-sysmmuPCIe cap [0x%x][%s]: 0x%x 3trsv_reg38A [0x0E28]: %#x 6%s: PCIE_ATU_CR1_OUTBOUND2(0x400) = 0x%x PCIE_MSI_INTR0_ENABLE(0x%x):0x%x exynos_pcie_rc_dislink_workep_pci_device:vendor/device id = 0x%xRC%d already offHOT RESET ENTRYexynos-pcie-msi0Failed to parse the channel number ## PCIe don't use PCIE ON Sleep PCIe I/A is ENABLED. Invalid use-ia value(set to default->false) 6. Test PCIe Dislink... can't find ssd pin info. Need to check EP device pwr pin 6%s: Before set perst, gpio val = %d 6%s: +++ [%s] pcie_is_linkup = 0 3PCIe: User of event registration is NULL pcie0Cant get idle_ip_dex!!! idleIRQ1 0x%x pm_resume_no_irq called5. Test PCIe Link recovery... PCIe UNIT test FAIL[5/6]!!! 6%s: Check EP BAR[%d] = 0x%x 6%s: PCIE_ATU_LOWER_TARGET_OUTBOUND2(0x414) = 0x%x exynos_pcie_rc_check_link_speed### EXYNOS PCIE ITMON ### HSI2PCIe Ch%d : There is no empty MSI vector! IOCC: not supported SoC(ip_ver=0x%x) 3PCIe S2MPU is NOT Enabled!!! Can't set L1SS!!! (EP: L1SS not supported) [ERR] EP: L1SS not supported (work_completion)(&(&exynos_pcie->cpl_timeout_work)->work)Invalid use-l1ss value(default=false) sysregData Link Feature3trsv_reg386 [0x0E18]: %#x 3Can't find PCIe read other configuration function exynos_pcie_rc_set_bar3PHY 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x 3[Print PHY_PCS region] 3offset: 0x0 0x4 0x8 0xC Fail: Unable to change to GEN%d exynos_pcie_rc_establish_linkexynos-pcie-msi4pcie10 : PCIe Unit Test l1ss_ctrl_id_state = 0x%08x pcie-clk-numpmu-offsetFailed to parse the number of chip-ver, default '0' Invalid use-sicd value(set to default->false) wlan gpio is not defined -> don't use wifi through pcie#%d failed to request MSI%d irq exynos_pcie_rc_remove3 3PHY 0x03F0: 0x%08x exynos_pcie_l1_exitIOCC: not supported: wrong ch_num DBI Link Control Register: 0x%xack message is ok&exynos_pcie->pcie_l1_exit_lockcouldn't create device file for link_speed(%d) 14 : PCIe Hot Reset ## LTSSM ## chip-verpcie-pm-qos-intPhysical Layer 16GT/s Margining3trsv_reg3B9 [0x0EE4]: %#x 3trsv_reg3BA [0x0EE8]: %#x PCIe UNIT test FAIL[1/6]!!! ## make gpio direction to output Wifi DMA operations are changed pm_suspend api called3[%s] set sudden_linkdown_state to recovery_on Callback for the event : %d exynos_pcie_rc_use_iaIOCC: use_cache_coherency = false %s, ip idle status : %d, idle_ip_index: %d &(&exynos_pcie->cpl_timeout_work)->timerFailed to parse the number of phy clock parse the separated msi: %d PCIe Secure ATU is DISABLED. failed to get syscon base address samsung,sysreg-phandleSecondary PCIe Capabilityexynos_pcie_rc_panic_notifier3trsv_reg36E [0x0DB8]: %#x 3trsv_reg394 [0x0E50]: %#x suspend_prepare called6Set BAR0 : 0x%x 3%s: +++ 3[Print PHY region] Failed to load pcie stateOC Initial Status check: 0x5FC(0x%x) CFG COMPLETELPBK EXIT TIMEOUTstatus %#x=%#x failedlogbuffer register failed &(&exynos_pcie->dislink_work)->timer## PCIe UNIT test SUCCESS!!## LTSSM :0x%x %u %u %lu power_statsupep-device-typeuse-cache-coherencyRC Link Declaration%s can't find wlan pin info. Need to check EP device power pin 6PCIe EP Vendor ID/Device ID = 0x%x chk_link_recovery6PCIe Link Down test Fail... 6%s: PCIE_ATU_LIMIT_OUTBOUND2(0x410) = 0x%x already in cpl recoveryClient driver does not have registration of the event : %d DETECT WAITexynos_pcie_rc_send_pme_turn_offexynos-pcie-msi2PCIe dis-link test success ## Dump RC Registers ## eom2PCIe I/A is DISABLED. PCIe NCLKOFF is ENABLED. syscon device node not found we have no ext capabilities! 3trsv_reg3B6 [0x0ED8]: %#x resume_complete calledPCIe UNIT test FAIL[4/6]!!! 3Can't find PCIe poweroff function samsung,exynos-pcie-rcexynos_pcie_rc_set_outbound_atuexynos_pcie_rc_force_linkdown_workexynos_pcie_rc_get_cpl_timeout_stateexynos_pcie_deregister_eventexynos_pcie_rc_print_msi_registerexynos_pcie_pm_suspendexynos_pcie_rc_set_sudden_linkdown_statepcie_linkup_statexynos_pcie_dbg_unit_testexynos_pcie_rc_register_dumpexynos_pcie_rc_get_sudden_linkdown_stateexynos_pcie_rc_set_affinityregister_separated_msi_vectorexynos_pcie_rc_l1ss_ctrlexynos_pcie_poweroffexynos_pcie_register_eventexynos_pcie_pm_resumeexynos_pcie_rc_set_cpl_timeout_stateexynos_pcie_set_ready_cto_recoveryexynos_pcie_rc_chk_link_statusexynos_pcie_dbg_link_testexynos_pcie_set_perst_gpioexynos_pcie_rc_dump_all_statusexynos_pcie_l1_exitexynos_pcie_poweron?#{!{#_?#{ @T@!B`B" @*{¨#_?#{{#_author=Hongseock Kim description=Samsung PCIe RC(RootComplex) controller driverlicense=GPL v2vermagic=5.10.177-android13-4-gebc441967af0-ab11066595 SMP preempt mod_unload modversions aarch64name=pcie_exynos_coreintree=Ydepends=exynos_pm_qos,exynos-pm,itmon,exynos-cpupm,pcie-exynos-gs201-rc-cal,logbuffer,exynos-pcie-iommu,shm_ipc,exynos-pd_el3scmversion=gebc441967af0Linuxpcie_exynos_core/module_layoutdmemset~)Hmemcpy ѩ__stack_chk_fail `Varm64_use_ng_mappingsmsleepS9iounmap3)Kk__ioremapj*_dev_warnA__tracepoint_android_rvh_pci_d3_sleep}lpanic_notifier_listS bcpu_bit_bitmapN__tracepoint_rwmmio_post_readn5__tracepoint_rwmmio_read3\W__tracepoint_rwmmio_writeOEplatform_driver_unregisterL\mutex_destroy%}Ԇlockdep_init_map_typeirq_get_irq_dataSwqueue_work_onfpci_msi_unmask_irqV+?wpci_msi_mask_irqdw_pcie_host_initlplatform_get_irqʦk,devm_ioremap_resource3platform_get_resource_bynameV#of_clk_get{Ԋpinctrl_lookup_state devm_pinctrl_getdevm_gpio_request_one*չgpiod_direction_output_raw]of_get_named_gpio_flags{'of_address_to_resourcen/of_parse_phandleD(syscon_regmap_lookup_by_phandle9aexynos_pm_qos_add_request_traceXQof_property_read_stringdma_set_coherent_mask_^gdma_set_masko__pm_runtime_resumecOdevm_kmallocлandroid_rvh_probe_register6of_property_read_variable_u32_array /ikstrtouintasysfs_emitnJnesnprintfnsscanfscnprintfcsysfs_create_group>Hdevice_create_file(}register_pcie_is_connectHatomic_notifier_chain_registertxitmon_notifier_chain_registerdelayed_work_timer_fn4Kinit_timer_key+Db__init_workalloc_workqueuejFqexynos_get_idle_ip_indexp*exynos_pcie_rc_phy_init.pm_runtime_enablewologbuffer_register__mutex_init)R__raw_spin_lock_initY`__platform_driver_registerRzdevm_request_threaded_irqHLhandle_level_irq(irq_domain_set_infoҟirq_domain_get_irq_dataU=0irq_find_mapping.%Qdw_handle_msi_irq@(irq_set_irq_wake2?+.pci_find_ext_capability2dgpiod_get_raw_valueedma_unmap_page_attrsdma_map_page_attrsSxpcie_iommu_unmap>dma_free_attrsTpcie_iommu_mapDždma_alloc_attrsxU5dw_pcie_msi_init$ shm_get_msi_basektime_get_with_offsetLupcie_sysmmu_set_use_iocce?ktime_getJJdw_pcie_setup_rcܚregmap_update_bits_basehrmw_priv_regclk_disable wclk_unprepareUclk_enableqs|clk_prepare:_raw_spin_unlock_irqrestorefwdw_pcie_readF:__arm_smccc_smcՃdw_pcie_writeKi__log_post_read_mmio__log_read_mmio1__log_write_mmioxgpio_to_desc\[gpiod_set_raw_valuesregmap_readZ%strcmpK{*irq_set_affinity_hintGusleep_range)ߟpci_find_bus__const_udelay=pcie_sysmmu_disableIqApci_restore_stateQ5epci_load_saved_state pci_store_saved_state'Hxpci_save_state/]mutex_unlockA_dev_erra2pci_rescan_busWepci_get_device enable_irqg{`pinctrl_select_stateopcie_sysmmu_enableK*exynos_pm_qos_update_requestUC͐exynos_update_ip_idle_statusa=mutex_lock_nestedAtlogbuffer_logkDlogbuffer_log,__cfi_slowpath]"_raw_spin_lock_irqsavejpci_read_config_dwordCpci_assign_resource_dev_infoo<disable_irqprintkGNU 哰սOyGNU@~8,0$ ( <4HDrlpt<@D048$(,x|TX\HLP`d9h h  Xt JKX <@D / 048 C$(,``dmh`tm    L L o 9 o 9 7 - - 0 K4 K<     , XP     X$ x0 t  ` ` 2 3  $ 4P 5 L L ` ` XL ``d`00L L  $X\```L ``00@L TL h] p] t``L ``$0(0L L ``HL P`T`t0x0L L !!HL`P`  , 4L T     $ ,D Ld l   n j  jnndmha$pmtQ&xa$|Q&(hmlm_)_);,;,0\2`d2hlmmmmX,\n`,dnls$ns$nL L DL pL L L L TnR*nR* Tvv 4T8=@=H\T`6h6pT - -TT||ttP$0<LXlXx\mhml,p/t,x/4 ,/,/ttSS//0  L L L L L !L (!L `!j!h!j!p!!m!m!m!m!u"u" $"&(","&0"4""m"4"m""4""""""""";";####$4$X$$$$0$0$$5$5$$$$$/$/%%% &(&H&l&&&&1'1' '/'/''($(L(t((()8)aD)aL)P)/X)/*,*L*l****+L+++++K+K++/+/,,, -4-\----./ ./.../D/l////0/0/00 1,1T1|111 2$2/,2/223<3d333344/4/4404044U/4U/44o/4o/45] 5] 55646\66667470870<7@7D7H7L7P7T7X7`7t7T7T7T7T77070777777<8L8d8x8888888909H9`9x99999;m;mH;qP;q\;p;Tt; ); );;T;;;;t&;*;#);t&;*;#);T;<T<0<T@<<<<=m =m=0==>T8>L L>L `>L t>4 >>4 >>4 >>4 ? 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.note.gnu.property.rela___ksymtab+exynos_pcie_set_ready_cto_recovery.rela___kcrctab+exynos_pcie_set_ready_cto_recovery.note.Linux.rela.exit.text.rela.init.text.comment.init.plt.bss.rela.rodata.pcie_dma_ops.rela.altinstructions__versions__ksymtab_strings.rela.text.register_separated_msi_vector.rela.data.msi_handler.rela___ksymtab_gpl+exynos_pcie_set_perst_gpio.rela___kcrctab_gpl+exynos_pcie_set_perst_gpio.modinfo__ksymtab_gpl__kcrctab_gpl.note.GNU-stack.llvm_addrsig.text.ftrace_trampoline.rela.gnu.linkonce.this_module.rela__jump_table.note.gnu.build-id.shstrtab.strtab__ksymtab.symtab__kcrctab.rodata.dataexynos_pcie_msi_set_affinity__kstrtabns_exynos_pcie_rc_set_affinity__crc_exynos_pcie_rc_set_affinity__kstrtab_exynos_pcie_rc_set_affinity__ksymtab_exynos_pcie_rc_set_affinitypci_find_ext_capabilityexynos_pcie_rc_print_link_history__kstrtabns_exynos_pcie_set_ready_cto_recovery__crc_exynos_pcie_set_ready_cto_recovery__kstrtab_exynos_pcie_set_ready_cto_recovery__ksymtab_exynos_pcie_set_ready_cto_recoverychk_link_recoverymemcpymutex_destroyinit_timer_keyexynos_pcie_rc_probe.__keyof_property_read_variable_u32_array__const_udelayexynos_get_idle_ip_indexpower_stats_showcomplete_timeout_irqs_showlink_down_irqs_showlink_recovery_failures_showlink_up_failures_showlink_state_showl12_state_showlink_up_average_showpll_lock_average_showlink_speed_showexynos_pcie_rc_showexynos_pcie_eom2_showexynos_pcie_eom1_showexynos_pcie_rc_wr_other_conf_newexynos_pcie_rc_rd_other_conf_newexynos_pcie_rc_wr_own_conf_newexynos_pcie_rc_rd_own_conf_newgpiod_direction_output_rawfake_dma_dev__kstrtabns_exynos_pcie_rc_set_outbound_atu__crc_exynos_pcie_rc_set_outbound_atu__kstrtab_exynos_pcie_rc_set_outbound_atu__ksymtab_exynos_pcie_rc_set_outbound_atupanic_notifier_listexynos_pm_qos_update_request__kstrtabns_exynos_pcie_dbg_unit_test__crc_exynos_pcie_dbg_unit_test__kstrtab_exynos_pcie_dbg_unit_test__ksymtab_exynos_pcie_dbg_unit_test__kstrtabns_exynos_pcie_dbg_link_test__crc_exynos_pcie_dbg_link_test__kstrtab_exynos_pcie_dbg_link_test__ksymtab_exynos_pcie_dbg_link_testdev_attr_pcie_rc_testexynos_pcie_rc_add_port__cfi_jt_startkstrtouintirq_set_affinity_hint__kstrtabns_exynos_pcie_deregister_event__crc_exynos_pcie_deregister_event__kstrtab_exynos_pcie_deregister_event__ksymtab_exynos_pcie_deregister_event__kstrtabns_exynos_pcie_register_event__crc_exynos_pcie_register_event__kstrtab_exynos_pcie_register_event__ksymtab_exynos_pcie_register_eventdma_set_mask_and_coherentcurrent_cntexynos_pcie_msi_set_affinity.cfi_jtexynos_pcie_rc_set_affinity.cfi_jtexynos_pcie_set_ready_cto_recovery.cfi_jtpower_stats_show.cfi_jtcomplete_timeout_irqs_show.cfi_jtlink_down_irqs_show.cfi_jtlink_recovery_failures_show.cfi_jtlink_up_failures_show.cfi_jtlink_state_show.cfi_jtl12_state_show.cfi_jtlink_up_average_show.cfi_jtpll_lock_average_show.cfi_jtlink_speed_show.cfi_jtexynos_pcie_rc_show.cfi_jtexynos_pcie_eom2_show.cfi_jtexynos_pcie_eom1_show.cfi_jtexynos_pcie_rc_wr_other_conf_new.cfi_jtexynos_pcie_rc_rd_other_conf_new.cfi_jtexynos_pcie_rc_wr_own_conf_new.cfi_jtexynos_pcie_rc_rd_own_conf_new.cfi_jtexynos_pcie_rc_set_outbound_atu.cfi_jt.exit.text.cfi_jtexynos_pcie_dbg_unit_test.cfi_jtexynos_pcie_dbg_link_test.cfi_jtexynos_pcie_deregister_event.cfi_jtexynos_pcie_register_event.cfi_jtexynos_pcie_l1_exit.cfi_jtexynos_pcie_rc_init.cfi_jtpcie_linkup_stat.cfi_jtexynos_pcie_rc_dump_all_status.cfi_jtexynos_pcie_rc_chk_link_status.cfi_jtpcie_dma_free_attrs.cfi_jtpcie_dma_alloc_attrs.cfi_jtregister_separated_msi_vector.cfi_jtexynos_pcie_rc_print_msi_register.cfi_jtexynos_pcie_rc_irq_handler.cfi_jtexynos_pcie_msi4_handler.cfi_jtexynos_pcie_msi3_handler.cfi_jtexynos_pcie_msi2_handler.cfi_jtexynos_pcie_msi1_handler.cfi_jtexynos_pcie_msi0_handler.cfi_jtexynos_pcie_rc_itmon_notifier.cfi_jtexynos_pcie_rc_panic_notifier.cfi_jtexynos_pcie_rc_resume_noirq.cfi_jtexynos_pcie_rc_suspend_noirq.cfi_jthandle_level_irq.cfi_jtpci_msi_unmask_irq.cfi_jtpci_msi_mask_irq.cfi_jtexynos_pcie_rc_link_up.cfi_jtexynos_pcie_rc_register_dump.cfi_jtexynos_pcie_set_perst_gpio.cfi_jtexynos_pcie_poweron.cfi_jtexynos_pcie_rc_poweron.cfi_jtdelayed_work_timer_fn.cfi_jtexynos_pcie_rc_l1ss_ctrl.cfi_jtexynos_pcie_rc_cpl_timeout_work.cfi_jtexynos_pcie_rc_force_linkdown_work.cfi_jtexynos_pcie_rc_dislink_work.cfi_jtexynos_d3_sleep_hook.cfi_jtexynos_pcie_rc_write_dbi.cfi_jtexynos_pcie_rc_read_dbi.cfi_jtexynos_pcie_rc_wr_other_conf.cfi_jtexynos_pcie_rc_rd_other_conf.cfi_jtexynos_pcie_rc_wr_own_conf.cfi_jtexynos_pcie_rc_rd_own_conf.cfi_jtexynos_pcie_poweroff.cfi_jtexynos_pcie_rc_poweroff.cfi_jtexynos_pcie_rc_remove.cfi_jtexynos_pcie_resume_complete.cfi_jtexynos_pcie_rc_set_cpl_timeout_state.cfi_jtexynos_pcie_rc_get_cpl_timeout_state.cfi_jtexynos_pcie_rc_set_sudden_linkdown_state.cfi_jtexynos_pcie_rc_get_sudden_linkdown_state.cfi_jtcomplete_timeout_irqs_store.cfi_jtlink_down_irqs_store.cfi_jtlink_recovery_failures_store.cfi_jtlink_up_failures_store.cfi_jtl12_state_store.cfi_jtlink_speed_store.cfi_jtexynos_pcie_rc_store.cfi_jte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