ELF<@@/-FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF$$$$   E$@[vEl sbc' ,8DDDDDDDDDDDDDDDDDDD`DDDDhDDDDDDp<l`6%s: PCIe link is not up 6%s: PCIE_ATU_LIMIT_OUTBOUND2(0x410) = 0x%x %s: pcie int_min_lock = %d3set cpl_timeout_recovery to %d for ch_num:%d exynos_pcie_l1_exitL1 IDLE Current Link Speed is GEN%d (MAX GEN%d)cannot receive L23_READY DLLP packet(0x%x)Failed to get pci devicePM_POWER_STATE = 0x%08x power_statsValue needs to be <= %d Failed to parse the number of chip-ver, default '0' start cpl recoverypm_resume_no_irq calledPCIe UNIT test FAIL[6/6]!!! Invalid target speed: Unable to change 3PCIe: User of event registration is NULL DETECT QUIETIOCC: not supported: wrong ch_num couldn't create device file for eom(%d) Value needs to be between 1-3 link_recovery_failurespll_lock_averageactive(irq0 = 0x%x, irq1 = 0x%x, irq2 = 0x%x) IRQ0 0x%x IRQ1 0x%x 6PCIe EP conf access Success. PCIE_IRQ2_EN: 0x%x LTSSM: 0x%08x %s: Unable to store saved state 3%s: EP is not EP_BCM_WIFI (not support l1_exit) HSI26[%s] pcie_is_linkup : %d Phy isolation val=%dCFG LINKWD START%10d## LTSSM ## ep-device-typePCIe L1SS(L1.2) is DISABLED. PCIe NCLKOFF is ENABLED. 3[Print PHY region] 3PHY 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x PCIe Ch%d : There is no empty MSI vector! RCVRY SPEED Unknown state..!! received Enter_L23_READY DLLP packet%s, ip idle status : %d, idle_ip_index: %d (work_completion)(&(&exynos_pcie->dislink_work)->work)## %s: PCIe probe success couldn't create device file for link_speed(%d) L1.2 Enable....on PCIe_ch%d Invalid support-msi64-addressing value(Set to default->true) use-phy-isol-enAdvanced Error Reporting! PCIE LINK DOWN-irq1_state: 0x%x !!! PCIE_CPL_TIMEOUT-irq2_state: 0x%x !!TEST PCIe %sLink Test 3Can't find PCIe poweron function 6PCIe DBI access Fail... 6Set BAR0 : 0x%x 6%s: --- 3ELBI 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x resumed_phydownClient driver does not have registration of the event : %d POLL COMPLIANCEL123 SEND EIDLE3PCIe S2MPU is NOT Enabled!!! &(&exynos_pcie->dislink_work)->timereom_result structure is NULL !!! use-sysmmuexynos_pcie_rc_removeresume_complete calledPCIe PMU ISOLATION 6PCIe link Down test Success. call PCIE_CPL_TIMEOUT callback Failed to load pcie state%s: Failed MSI initialization(%d) Fail: Unable to change to GEN%d l12_statedownFailed to parse the number of phy clock Failed to parse the number of pmu-offset perst-delay-usInvalid use-nclkoff_en value(set to default -> false) Data Link Feature2. Test DBI access... PCIe UNIT test FAIL[4/6]!!! PCIE_MSI_ADDR_LO: 0x%x start force Link down S/W recovery Event is deregistered for RC %d skip register dump(ip_ver = 0x%x) 6PCIe Ch%d MSI%d vector is registered! Link is not up, try count: %d, linksts: %s(0x%x)RCVRY RCVRCFGMSI memory is allocated over 32bit boundary DBI Link Control Register: 0x%x## PCIe dis-link test ## PCIe dis-link test failed (%d) %s:[hot reset] by pulsing app_init_rst(ch %d) support-msi64-addressingudbg Unknown id ..!!DMA_MONITOR3: 0x%08x 3[%s] set sudden_linkdown_state to recovery_on Check unexpected state - H/W:0x%x, S/W:%d pcie_linkup_statCFG IDLEexynos_pcie_rc_send_pme_turn_off&exynos_pcie->reg_lock%d complete_timeout_irqs%s: pcie int_min_lock = %d failed to get syscon base address failed to request irq Default must_resume value : %d chk_link_recoverypcie link up failep_pci_device:vendor/device id = 0x%x%s## PCIe UNIT test SUCCESS!!## l1ss_ctrl_id_state = 0x%08x link_speedChange Link Speed: Target Link Speed = GEN%d Unset separated-msi value, default '0' Invalid use-l1ss value(default=false) elbirestore enable cnt = %d Dis6%s: Set PERST to HIGH, gpio val = %d 6[%s] ch_num:%d PCIE_MSI_ADDR_HI: 0x%x 3%s: +++ exynos-pcie-msi1## %s: PCIe probe failed couldn't create device file for linkst(%d) PCIe UNIT test failed (%d) GEN%d skip wr_other_conf where=%#04x val=%#02x trueFailed to get pcie clock iaPhysical Layer 16GT/s Margining3Can't find PCIe read other configuration function exynos_pcie_rc_set_bar6%s: PCIE_ATU_UPPER_TARGET_OUTBOUND2(0x418) = 0x%x 3[Print PHY_PCS region] exynos_pcie_rc_poweroffAlready GEN%d(current), target: GEN%d RCVRY LOCKDISABLEDlink state:%x&exynos_pcie->s2mpu_refcnt_lockpcie0exynos_pcie_rc_storelink_down_irqsFailed to parse the number of pcie clock Invalid use-msi value(Set to default->true) Invalid use-sicd value(set to default->false) use-iaInvalid use-ia value(set to default->false) Initialize PCIe function. 6%s: PCIE_ATU_UPPER_BASE_OUTBOUND2(0x40C) = 0x%x DMA_MONITOR1: 0x%08x pwron: pcs+0x150: %#x6%s: enable = %d LPBK ACTIVE3EP device is NULL!!! &exynos_pcie->power_onoff_lock&(&exynos_pcie->cpl_timeout_work)->timer0 : PCIe Unit Test LTSSM :0x%x ip-versocremove enable cnt to fake enable = %d 3. Test EP configuration access... 5. Test PCIe Link recovery... 6PCIe DBI access Success. 6%s: Before set perst, gpio val = %d 6%s: After set perst, gpio val = %d DMA_MONITOR2: 0x%08x Callback for the event : %d CFG LINKWD ACEPTL2 _WAKEPCIe establish link test failed (%d) EOM2NULL Link %s: Cumulative count: 0x%llx Cumulative duration msec: 0x%llx Last entry timestamp msec: 0x%llx link_up_failuresEP device type is NOT defined, device type is 'EP_NO_DEVICE(0)' use-cache-coherencyPCIe SysMMU is DISABLED. PCIe DYNAMIC PHY ISOLATION is Disabled. Power Managementcan't find ssd pin info. Need to check EP device pwr pin LTSSM: 0x%02x, L1sub: 0x%x, D state: 0x%x 6%s: PCIE_ATU_LOWER_BASE_OUTBOUND2(0x408) = 0x%x already in linkdown recoveryexynos_pcie_rc_poweronpcie clk enable, ret value = %dLink Speed Changed: from GEN%d to GEN%d DETECT ACTHOT RESETFailed to parse the channel number &exynos_pcie->conf_lockpcie1pcie_wqcouldn't create device file for test(%d) ## PCIe establish link test ## eom2Invalid use-phy-isol-en value(set to default -> false) ssd gpio is not defined -> don't use ssd through pcie#%d we have no ext capabilities! Message Signalled Interruptsin cpl recovery3%s: fail 6%s: PCIE_ATU_CR1_OUTBOUND2(0x400) = 0x%x [Advanced Error Report] PCIE_MSI_INTR0_STATUS: 0x%x 3PHY 0x17C0 : 0x%08x end poweron, state: %d CFG LANENUM WAIT3Can't map PCIe SysMMU table! Can't set L1SS!!! (EP: L1SS not supported) num-lanespcie_rc_testlink_statsMSI is ENABLED. Support for 64-bit MSI addressing is ENABLED. ## PCIe don't support 64-bit MSI addressing PCIe on sleep... suspend /mnt/disks/build-disk/src/partner-android/android14-gs-pixel-5.15-udc-qpr1/out/bazel/output_user_root/6fb5c89176824bd9e4cc4c4e857fcff1/sandbox/linux-sandbox/71/execroot/__main__/aosp/../private/google-modules/soc/gs/drivers/pci/controller/dwc/pcie-exynos-dbg.c6%s: Check EP BAR[%d] = 0x%x 3%s: --- %s: Failed MSI initialization(%d)%s: Link is up. But not max speed, try count: %d exynos-pcie-msi0>>>> PCIe Test <<<< %u %u %lu uppmu-offset## PCIe don't use SICD use-pcieon-sleepPhysical Layer 16GT/s6PCIe EP conf access Fail... %s, pcie_is_linkup 0 already in cpl recoveryexynos_pcie_rc_set_sudden_linkdown_stateskip wr_own_conf where=%#04x val=%#02x L2 IDLELPBK EXIT TIMEOUTHOT RESET ENTRYCOPY ep_dev to PCIe memory struct Unexpected separated MSI3 interrupt!PERST delay is NOT defined...default to 20ms Power Budgetingexynos-pcie6PCIe EP Outbound mem access Fail... 6%s: Set PERST to LOW, gpio val = %d 6%s: PCIE_ATU_LOWER_TARGET_OUTBOUND2(0x414) = 0x%x 3%s: cannot change to L0(LTSSM = 0x%x, cnt = %d) exynos_pcie_rc_l1ss_ctrl(work_completion)(&(&exynos_pcie->cpl_timeout_work)->work)%s: force perst setting eom_result structure is NULL!! link_stateMAX Link Speed is NOT defined...(GEN1) PCIe SysMMU is ENABLED. Secondary PCIe Capabilitycheck irq22 pending clear: irq2_state = 0x%x 6PCIe EP Vendor ID/Device ID = 0x%x 6PCIe EP Outbound mem access Success. 3PHY 0x760 : %#08x, 0x764 : %#08x Wifi DMA operations are changed pm_resume api called3%s: 'use_l1ss' is false in DT(not support L1.2) DETECT WAITDISABLED ENTRYLPBK EXIT%s: msi_addr_from_dt is null Xmit OFF sent&exynos_pcie->power_stats_lockcouldn't create device file for l12_state(%d) ## PCIe UNIT test START ## L1.2 Disable....on PCIe_ch%d PCIe NCLKOFF is DISABLED. PCIe DYNAMIC PHY ISOLATION is Enabled. samsung,syscon-phandle## make gpio set high exynos_pcie_rc_print_msi_register3%s: ch#%d PCIe device is not loaded start poweroff, state: %dreset skip config access flag exynos_pcie_rc_chk_link_statusexynos_pcie_rc_check_link_speed3Warning: exynos_pcie_rc_set_enable_wake: not exist pp D state: %x, LTSSM: %xPOLL ACTIVESet PERST LOW, gpio val = %d cannot receive ack message from EPUnexpected separated MSI4 interrupt!PCIe establish link test success parse the separated msi: %d Virtual Channel Capabilitysuspend_prepare calledcan't find ssd pin info. Need to check EP device power pin PCIe UNIT test FAIL[3/6]!!! can't find wlan pin info. Need to check EP device pwr pin offset: 0x0 0x4 0x8 0xC PCIE_MSI_INTR0_MASK(0x%x):0x%x start linkdown recoveryexynos_pcie_rc_establish_link&exynos_pcie->pcie_l1_exit_lockPCIE idle ip index : %d PCIe dis-link test success chip-verpcie,wlan-gpiogpiosPCI Express%d separated MSI irq is defined. failed to request MSI%d irq Failed to set DMA mask to 32-bit.4. Test EP Outbound memory region... 6PCIe link test Success. 6PCIe Link Recovery test Fail... exynos_pcie_set_perst_gpioSkip config flag set to %d 6%s: +++ 3[Print DBI region] PCIE link state is %d [%s] pcie_is_linkup = 0 RC%d already off3PCIe: did not find RC for pci endpoint device 3PCIe: Event deregistration is NULL 3PCIe: User of event deregistration is NULL 3failed to request MSI%d irq CFG LANENUM ACEPTL0sexynos_pcie_rc_msi_initack message is okexynos-pcie-msi4invalid ch_num=%d for logbuffer registry PCIe %d: probe faileduse-msi## PCIe use SICD Invalid use-sysmmu value(set to default->false) RC Link Declaration%s 3Can't find PCIe read own configuration function 6%s: target_addr = 0x%x, offset = 0x%x, size = 0x%x 3PHY 0x0FC0: 0x%08x 3UDBG 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x exynos_pcie_rc_cpl_timeout_workCFG COMPLETELPBK ENTRY exynos-pcie-msi2## PCIe RC PROBE start 1 : Link Test Invalid use-cache-coherency value(Set to default->false) ## PCIe don't use MSI use-sicd## PCIe use PCIE ON Sleep ## PCIe don't use PCIE ON Sleep Invalid use-pcieon-sleep value(set to default->false) 3Can't find PCIe poweroff function [%s] Link is not up PCIE_MSI_INTR0_ENABLE(0x%x):0x%x exynos_pcie_rc_register_dump3PCS 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x pm_suspend api calledexynos_pcie_rc_set_enable_wake[ERR] EP: L1SS not supported Unexpected separated MSI0 interrupt!Unexpected separated MSI2 interrupt!## PCIe ch %d ## couldn't create workqueue ## register pcie connection function separated-msiCache Coherency unit is ENABLED. use-nclkoff-enexynos_pcie_rc_parse_dtsyscon regmap lookup failed. syscon device node not found samsung,sysreg-phandlepcsMSI: separated msi & pcieonsleep 6. Test PCIe Dislink... 3Can't find PCIe write own configuration function DBI %#02x: %#04x %#04x %#04x %#04x skip rd_own_conf where=%#04x RCVRY IDLEexynos-pcie-msi3phy-clk-numfalsePCIe I/A is DISABLED. failed to get irq 3Can't find PCIe write other configuration function /mnt/disks/build-disk/src/partner-android/android14-gs-pixel-5.15-udc-qpr1/out/bazel/output_user_root/6fb5c89176824bd9e4cc4c4e857fcff1/sandbox/linux-sandbox/71/execroot/__main__/aosp/../private/google-modules/soc/gs/drivers/pci/controller/dwc/pcie-exynos-rc.c end poweroff, state: %d (%s) Current link speed(0x80): GEN%d %s(0x%x)exynos-pcie-rcUnsupported Test Number(%d)... eom1skip rd_other_conf where=%#04x PCIe on sleep resume... 6PCIe Link Down test Fail... LTSSM_H: 0x%08x link down and recovery cnt: %d Disable PCIE2 PHY %s, pcie_is_linkup 0%s, pcie link is not up LTSSM: 0x%08x, PM_STATE = 0x%08x Version: 1 Can't get pcie pinctrl!!! PCIe cap [0x%x][%s]: 0x%x IRQ2 0x%x PCIe UNIT test FAIL[2/6]!!! exynos_pcie_rc_set_outbound_atuIOCC: use_cache_coherency = false Unexpected separated MSI1 interrupt!logbuffer register failed couldn't create device file for power_stats(%d) max-link-speedPCIe I/A is ENABLED. PCIe L1SS(L1.2) is ENABLED. wlan gpio is not defined -> don't use wifi through pcie#%d cannot get perst_gpio Can't set pcie clkerq to output high! sysregDevice Serial NumberPCIe UNIT test FAIL[1/6]!!! ## make gpio direction to output 6PCIe link Recovery test Success. %s: Set PERST to LOW, gpio val = %dLink is not up POLL CONFIGCant get idle_ip_dex!!! PCIe ext cap [0x%x][%s]: 0x%x 6PCIe Link test Fail... exynos_pcie_set_ready_cto_recovery6%s: PCIE_ATU_CR2_OUTBOUND2(0x404) = 0x%x 3offset: 0x0 0x4 0x8 0xC 3 3offset: 0x0 0x4 0x8 0xC exynos_pcie_rc_dislink_work(phy+0xC08=0x%x)(phy+0x1408=0x%x)(phy+0xC6C=0x%x)(phy+0x146C=0x%x)Current PM state(PCS + 0x188) : 0x%xFailed to create pcie sys file exynos_pcie_rc_probepcie-clk-numparse the number of lanes: %d SYSREG is not defined. idledbi Unknown id..!!failed to dw pcie host init 3PHY 0x03F0: 0x%08x 3[-------- Print additional PHY Register --------] 3DBI 0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x ### EXYNOS PCIE ITMON ### ### PMU PHY Isolation : 0x%x L0DISABLED IDLEPCIe %d: probe done2 : DisLink Test Value needs to be 0 or 1 Failed to parse the number of ip-ver Failed to parse the # of lanes, default '1' use-l1sspcie-pm-qos-intL1 PM Substates6%s: force settig for abnormal state 3[Print SUB_CTRL region] start poweron, state: %d3PCIe: Event registration is NULL exynos_pcie_rc_set_affinityForce PCIe poweroff --> poweron PRE DETECT QUIET3DMA map - Can't map PCIe SysMMU table!!! ch-numcouldn't create sysfs group for link_stats(%d) 14 : PCIe Hot Reset can't get num of lanes!! link_up_averagepcie,ssd-gpioNo idle pin state(but it's OK)!! phypm_suspend_no_irq calledcan't find wlan pin info. Need to check EP device power pin 1. Test PCIe LINK... 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