Searched defs:And1 (Results 1 – 11 of 11) sorted by relevance
| /external/oboe/samples/RhythmGame/third_party/glm/gtx/ |
| D | simd_vec4.inl | 320 __m128 And1 = _mm_and_ps(Flr1, Cmp1); local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonLoopIdiomRecognition.cpp | 1615 Instruction *And1 = dyn_cast<Instruction>(I->getOperand(1)); in setupPreSimplifier() local
1747 Instruction *And1 = dyn_cast<Instruction>(Xor->getOperand(1)); in setupPostSimplifier() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 4066 auto And1 = MIRBuilder.buildAnd(Src1Ty, Src0, SignBitMask); in lowerFCopySign() local
4072 auto And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask); in lowerFCopySign() local
4078 auto And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask); in lowerFCopySign() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 2253 SDValue And1 = N->getOperand(1); in tryBitfieldInsertOpFromOr() local
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 4045 Value *And1 = Builder->CreateAnd(BO0->getOperand(0), Mask); in visitICmpInst() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 2462 SDValue And1 = N->getOperand(1); in tryBitfieldInsertOpFromOr() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 734 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); in performORCombine() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 875 SDValue And0 = N->getOperand(0), And1 = N->getOperand(1); in performORCombine() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 4004 Value *And1 = Builder.CreateAnd(BO0->getOperand(0), Mask); in foldICmpBinOp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 6019 SDValue And1 = DAG.getNode(ISD::AND, DL, ShVT, NegOp1, BitWidthMinusOneC); in expandROT() local
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| D | DAGCombiner.cpp | 5106 SDValue Not = And->getOperand(0), And1 = And->getOperand(1); in combineShiftAnd1ToBitTest() local
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