| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 109 unsigned CPUID) const { in isZeroIdiom()
134 unsigned CPUID) const { in isDependencyBreaking()
145 unsigned CPUID) const { in isOptimizableRegisterMove()
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| D | MCSubtargetInfo.h | 215 unsigned CPUID) const { in resolveVariantSchedClass()
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| /external/swiftshader/src/System/ |
| D | CPUID.hpp | 28 class CPUID class
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| /external/swiftshader/src/Reactor/ |
| D | CPUID.hpp | 28 class CPUID class
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| D | SubzeroReactor.cpp | 279 class CPUID class
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCSchedule.cpp | 75 unsigned CPUID = getProcessorID(); in computeInstrLatency() local
121 unsigned CPUID = getProcessorID(); in getReciprocalThroughput() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
| D | InstrBuilder.cpp | 524 unsigned CPUID = SM.getProcessorID(); in createInstrDescImpl() local
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| /external/cpu_features/src/ |
| D | impl_x86__base_implementation.inl | 427 #define CPUID(FAMILY, MODEL) ((((FAMILY)&0xFF) << 8) | ((MODEL)&0xFF)) macro
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/BinaryFormat/ |
| D | Minidump.h | 150 support::ulittle32_t CPUID; member
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/ |
| D | core_cm0.h | 391 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm0plus.h | 405 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_sc000.h | 397 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_sc300.h | 419 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm3.h | 419 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm4.h | 487 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm7.h | 502 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/ |
| D | core_cm0.h | 391 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_sc000.h | 397 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm0plus.h | 405 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm3.h | 419 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_sc300.h | 419 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm4.h | 487 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| D | core_cm7.h | 502 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 804 #define CPUID CHOICE(D_BYTE ARG2(15, 162), cpuid, D_BYTE ARG2(15, 162)) macro
1151 #define CPUID cpuid macro
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