| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 93 int DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
108 int DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
128 int DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 250 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI()
261 unsigned DestReg) { in BuildMI()
277 unsigned DestReg) { in BuildMI()
286 unsigned DestReg) { in BuildMI()
296 unsigned DestReg) { in BuildMI()
350 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 63 const DebugLoc &dl, unsigned DestReg, in emitThumb1LoadConstPool()
83 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
126 const DebugLoc &dl, unsigned DestReg, unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
188 const DebugLoc &dl, unsigned DestReg, in emitThumbRegPlusImmediate()
375 Register DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
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| D | Thumb1InstrInfo.cpp | 40 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
107 unsigned DestReg, int FI, in loadRegFromStackSlot()
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| D | Thumb2InstrInfo.cpp | 123 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
179 unsigned DestReg, int FI, in loadRegFromStackSlot()
232 const DebugLoc &dl, unsigned DestReg, in emitT2RegPlusImmediate()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 395 unsigned DestReg = createResultReg(RC); in materializeFP() local
401 unsigned DestReg = createResultReg(RC); in materializeFP() local
416 unsigned DestReg = createResultReg(RC); in materializeGV() local
438 unsigned DestReg = createResultReg(RC); in materializeExternalCallSym() local
1012 unsigned DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt() local
1089 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc() local
1127 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt() local
1603 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall() local
1731 Register DestReg = VA.getLocReg(); in selectRet() local
1833 unsigned DestReg) { in emitIntSExt32r1()
[all …]
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| D | MipsInstrInfo.h | 122 unsigned DestReg, int FrameIndex, in loadRegFromStackSlot()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 348 unsigned DestReg = createResultReg(RC); in materializeFP() local
354 unsigned DestReg = createResultReg(RC); in materializeFP() local
369 unsigned DestReg = createResultReg(RC); in materializeGV() local
391 unsigned DestReg = createResultReg(RC); in materializeExternalCallSym() local
964 unsigned DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt() local
1036 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc() local
1074 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt() local
1356 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall() local
1482 unsigned DestReg = VA.getLocReg(); in selectRet() local
1576 unsigned DestReg) { in emitIntSExt32r1()
[all …]
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| D | MipsInstrInfo.h | 107 unsigned DestReg, int FrameIndex, in loadRegFromStackSlot()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 79 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
86 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVExpandPseudoInsts.cpp | 238 Register DestReg = MI.getOperand(0).getReg(); in doAtomicBinOpExpansion() local
274 MachineBasicBlock *MBB, Register DestReg, in insertMaskedMerge()
300 Register DestReg = MI.getOperand(0).getReg(); in doMaskedAtomicBinOpExpansion() local
439 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicMinMaxOp() local
552 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicCmpXchg() local
632 Register DestReg = MI.getOperand(0).getReg(); in expandAuipcInstPair() local
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| /external/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 64 const DebugLoc &dl, unsigned DestReg, in emitThumb1LoadConstPool()
84 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
125 const DebugLoc &dl, unsigned DestReg, unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
180 const DebugLoc &dl, unsigned DestReg, in emitThumbRegPlusImmediate()
366 unsigned DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
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| D | Thumb1InstrInfo.cpp | 42 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
98 unsigned DestReg, int FI, in loadRegFromStackSlot()
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| D | Thumb2InstrInfo.cpp | 114 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
169 unsigned DestReg, int FI, in loadRegFromStackSlot()
223 const DebugLoc &dl, unsigned DestReg, in emitT2RegPlusImmediate()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 324 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
335 Register DestReg) { in BuildMI()
351 Register DestReg) { in BuildMI()
360 Register DestReg) { in BuildMI()
370 Register DestReg) { in BuildMI()
424 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZPostRewrite.cpp | 89 Register DestReg = MBBI->getOperand(0).getReg(); in selectLOCRMux() local
110 Register DestReg = MBBI->getOperand(0).getReg(); in selectSELRMux() local
164 Register DestReg = MI.getOperand(0).getReg(); in expandCondMove() local
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| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 36 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
65 unsigned DestReg, int FI, in loadRegFromStackSlot()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 65 unsigned DestReg, int FrameIdx, in loadRegFromStackSlot()
92 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 33 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
149 unsigned DestReg, int FI, in loadRegFromStackSlot()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 66 unsigned DestReg, int FrameIdx, in loadRegFromStackSlot()
93 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600MachineScheduler.cpp | 275 unsigned DestReg = MI->getOperand(0).getReg(); in getAluKind() local
362 unsigned DestReg = MI->getOperand(DstIndex).getReg(); in AssignSlot() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600MachineScheduler.cpp | 273 Register DestReg = MI->getOperand(0).getReg(); in getAluKind() local
360 Register DestReg = MI->getOperand(DstIndex).getReg(); in AssignSlot() local
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| D | AMDGPUMachineCFGStructurizer.cpp | 178 PHILinearize::findPHIInfoElement(unsigned DestReg) { in findPHIInfoElement()
215 void PHILinearize::addDest(unsigned DestReg, const DebugLoc &DL) { in addDest()
229 void PHILinearize::deleteDef(unsigned DestReg) { in deleteDef()
235 void PHILinearize::addSource(unsigned DestReg, unsigned SourceReg, in addSource()
240 void PHILinearize::removeSource(unsigned DestReg, unsigned SourceReg, in removeSource()
246 unsigned &DestReg) { in findDest()
257 unsigned DestReg; in isSource() local
261 unsigned PHILinearize::getNumSources(unsigned DestReg) { in getNumSources()
1407 unsigned DestReg = getPHIDestReg(PHI); in storePHILinearizationInfo() local
1571 auto DestReg = getPHIDestReg(PHI); in replaceEntryPHI() local
[all …]
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| /external/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.cpp | 43 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
139 unsigned DestReg, int FrameIndex, in loadRegFromStackSlot()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 822 bool IsZExt, unsigned DestReg, in PPCEmitCmp()
989 unsigned DestReg; in SelectFPTrunc() local
1096 unsigned DestReg = createResultReg(&PPC::SPERCRegClass); in SelectIToFP() local
1133 unsigned DestReg = createResultReg(RC); in SelectIToFP() local
1225 unsigned DestReg; in SelectFPToI() local
1805 unsigned DestReg, bool IsZExt) { in PPCEmitIntExt()
2009 unsigned DestReg = createResultReg(RC); in PPCMaterializeFP() local
2061 unsigned DestReg = createResultReg(RC); in PPCMaterializeGV() local
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