| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 690 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
714 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 509 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 506 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2); in optimizeSelect() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CmovConversion.cpp | 715 Register FalseReg = in convertCmovInstsToBranches() local
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| D | X86InstrInfo.cpp | 2832 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 848 unsigned FalseReg, int &CondCycles, in canInsertSelect()
871 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 757 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
2224 unsigned TrueReg, unsigned FalseReg, in selectReg()
2816 Register FalseReg = CompareUseMI.getOperand(2).getReg(); in convertToImmediateForm() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 899 unsigned FalseReg = getRegForValue(Select->getFalseValue()); in selectSelect() local
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| D | WebAssemblyISelLowering.cpp | 387 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 728 unsigned FalseReg = getRegForValue(Select->getFalseValue()); in selectSelect() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 790 auto FalseReg = MIB->getOperand(3).getReg(); in selectSelect() local
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| D | ARMBaseInstrInfo.cpp | 2245 MachineOperand FalseReg = MI.getOperand(Invert ? 2 : 1); in optimizeSelect() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 687 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 535 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
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| D | SystemZISelLowering.cpp | 6815 Register FalseReg = MI->getOperand(2).getReg(); in createPHIsForSelects() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 368 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, in canInsertSelect()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1900 MachineOperand FalseReg = MI.getOperand(Invert ? 2 : 1); in optimizeSelect() local
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 4279 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 499 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2128 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 5205 unsigned FalseReg = MI.getOperand(2).getReg(); in emitSelect() local
|