| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 283 const HexagonRegisterInfo &HRI) { in needsStackFrame()
404 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in findShrunkPrologEpilog() local
505 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in emitPrologue() local
589 auto &HRI = *HST.getRegisterInfo(); in insertPrologueInBlock() local
650 auto &HRI = *HST.getRegisterInfo(); in insertEpilogueInBlock() local
738 auto &HRI = *HST.getRegisterInfo(); in insertAllocframe() local
886 auto &HRI = *HST.getRegisterInfo(); in insertCFIInstructionsAt() local
997 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in hasFP() local
1113 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in getFrameIndexReference() local
1211 const CSIVect &CSI, const HexagonRegisterInfo &HRI, in insertCSRSpillsInBlock()
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| D | HexagonISelDAGToDAG.h | 33 const HexagonRegisterInfo *HRI; variable
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| D | HexagonVLIWPacketizer.h | 67 const HexagonRegisterInfo *HRI; variable
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| D | HexagonBranchRelaxation.cpp | 69 const HexagonRegisterInfo *HRI; member
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| D | HexagonConstExtenders.cpp | 383 const HexagonRegisterInfo *HRI = nullptr; member
447 const HexagonRegisterInfo &HRI; member
463 const HexagonRegisterInfo &HRI; member
481 const HexagonRegisterInfo &HRI; member
496 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in operator <<() local
552 const HexagonRegisterInfo &HRI; member
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| D | HexagonVExtract.cpp | 104 const auto &HRI = *HST->getRegisterInfo(); in runOnMachineFunction() local
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| D | HexagonBitSimplify.cpp | 438 auto &HRI = static_cast<const HexagonRegisterInfo&>( in parseRegSequence() local
902 auto &HRI = static_cast<const HexagonRegisterInfo&>( in getFinalVRegClass() local
1069 const HexagonRegisterInfo &HRI; member in __anon0706995e0511::RedundantInstrElimination
1508 const HexagonRegisterInfo &HRI; member in __anon0706995e0711::CopyGeneration
1528 const HexagonRegisterInfo &HRI; member in __anon0706995e0711::CopyPropagation
1785 const HexagonRegisterInfo &HRI; member in __anon0706995e0811::BitSimplification
2764 auto &HRI = *HST.getRegisterInfo(); in runOnMachineFunction() local
2901 const HexagonRegisterInfo *HRI = nullptr; member in __anon0706995e0d11::HexagonLoopRescheduling
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| D | HexagonInstrInfo.cpp | 126 static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI) { in isDblRegForSubInst()
791 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in copyPhysReg() local
987 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in expandPostRAPseudo() local
1621 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in DefinesPredicate() local
2092 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in isDependent() local
3727 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in getDuplexCandidateGroup() local
4099 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in getOperandLatency() local
4212 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in getMemAccessSize() local
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| D | HexagonRDFOpt.cpp | 295 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction() local
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| D | HexagonBitTracker.cpp | 95 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in mask() local
138 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in composeWithSubRegIndex() local
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| D | HexagonISelLowering.cpp | 427 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerCall() local
632 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerINLINEASM() local
1021 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerRETURNADDR() local
1047 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerFRAMEADDR() local
1147 const auto &HRI = *Subtarget.getRegisterInfo(); in GetDynamicTLSAddr() local
1290 auto &HRI = *Subtarget.getRegisterInfo(); in HexagonTargetLowering() local
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| D | HexagonGenMux.cpp | 89 const HexagonRegisterInfo *HRI = nullptr; member in __anonc23e35060111::HexagonGenMux
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| D | HexagonAsmPrinter.cpp | 270 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in HexagonProcessInstruction() local
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| D | HexagonOptAddrMode.cpp | 84 const HexagonRegisterInfo *HRI = nullptr; member in __anond4e6d6450111::HexagonOptAddrMode
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| D | HexagonVLIWPacketizer.cpp | 116 const HexagonRegisterInfo *HRI = nullptr; member in __anona2a613660111::HexagonPacketizer
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 242 const HexagonRegisterInfo &HRI) { in needsStackFrame()
346 auto &HRI = *HST.getRegisterInfo(); in findShrunkPrologEpilog() local
444 auto &HRI = *HST.getRegisterInfo(); in emitPrologue() local
500 auto &HRI = *HST.getRegisterInfo(); in insertPrologueInBlock() local
586 auto &HRI = *HST.getRegisterInfo(); in insertEpilogueInBlock() local
736 auto &HRI = *HST.getRegisterInfo(); in insertCFIInstructionsAt() local
845 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in hasFP() local
962 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in getFrameIndexReference() local
1044 const CSIVect &CSI, const HexagonRegisterInfo &HRI, in insertCSRSpillsInBlock()
1207 const HexagonRegisterInfo &HRI, const TargetRegisterClass *RC) { in needToReserveScavengingSpillSlots()
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| D | HexagonVLIWPacketizer.h | 41 const HexagonRegisterInfo *HRI; variable
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| D | HexagonBranchRelaxation.cpp | 58 const HexagonRegisterInfo *HRI; member
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| D | HexagonRDFOpt.cpp | 282 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction() local
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| D | HexagonInstrInfo.cpp | 114 static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI) { in isDblRegForSubInst()
764 auto &HRI = getRegisterInfo(); in copyPhysReg() local
988 const HexagonRegisterInfo &HRI = getRegisterInfo(); in expandPostRAPseudo() local
1421 auto &HRI = getRegisterInfo(); in DefinesPredicate() local
1970 auto &HRI = getRegisterInfo(); in isDependent() local
3639 auto &HRI = getRegisterInfo(); in getDuplexCandidateGroup() local
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| D | HexagonGenMux.cpp | 59 const HexagonRegisterInfo *HRI; member in __anon5f1a3ba40111::HexagonGenMux
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| D | HexagonISelLowering.cpp | 725 auto &HRI = *Subtarget.getRegisterInfo(); in LowerCall() local
1438 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerRETURNADDR() local
1464 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerFRAMEADDR() local
1706 auto &HRI = *Subtarget.getRegisterInfo(); in HexagonTargetLowering() local
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| D | HexagonVLIWPacketizer.cpp | 89 const HexagonRegisterInfo *HRI; member in __anon2af5d8040111::HexagonPacketizer
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| D | HexagonISelDAGToDAG.cpp | 48 const HexagonRegisterInfo *HRI; member in __anoned469b780111::HexagonDAGToDAGISel
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| D | HexagonBitSimplify.cpp | 2184 auto &HRI = *HST.getRegisterInfo(); in runOnMachineFunction() local
2315 const HexagonRegisterInfo *HRI; member in __anon7ce572bc0911::HexagonLoopRescheduling
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