| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 87 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 333 MachineInstrBuilder ImpDef = BuildMI(*PredMBB, InsertPos, in computeMainRangesFixFlags() local
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| /external/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 321 MachineInstrBuilder ImpDef = BuildMI(*PredMBB, InsertPos, in computeMainRangesFixFlags() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 99 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 435 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
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| D | ScheduleDAGRRList.cpp | 1286 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
2859 for (const MCPhysReg *ImpDef = ImpDefs; *ImpDef; ++ImpDef) in canClobberReachingPhysRegUse() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 443 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
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| D | ScheduleDAGRRList.cpp | 1199 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
2715 for (const MCPhysReg *ImpDef = ImpDefs; *ImpDef; ++ImpDef) in canClobberReachingPhysRegUse() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 249 auto ImpDef = B.buildUndef(BigTy); in unpackRegsToOrigType() local
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| D | AMDGPUISelDAGToDAG.cpp | 717 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, in SelectBuildVector() local
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| D | SIISelLowering.cpp | 10381 SDValue ImpDef = DAG.getCopyToReg(DAG.getEntryNode(), SDLoc(Node), in PostISelFolding() local
10419 MachineSDNode *ImpDef = DAG.getMachineNode(TargetOpcode::IMPLICIT_DEF, in PostISelFolding() local
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| D | SIInstrInfo.cpp | 4312 bool ImpDef = Def->isImplicitDef(); in legalizeGenericOperand() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 349 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, in Select() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 911 for (unsigned ImpDef : ImpDefs) in MergeOpsUpdate() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 955 for (unsigned ImpDef : ImpDefs) in MergeOpsUpdate() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 1160 Register ImpDef = MIRBuilder.buildUndef(OldTy).getReg(0); in moreElementsVectorSrc() local
1170 Register ImpDef = MIRBuilder.buildUndef(MoreTy).getReg(0); in moreElementsVectorSrc() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 766 SDValue ImpDef = SDValue( in Widen() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 911 SDValue ImpDef = SDValue( in Widen() local
|