| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 419 unsigned Lane, bool QPR) { in createDupLane()
434 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg()
479 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg()
544 unsigned Lane; in optimizeAllLanesPattern() local
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| D | ARMBaseInstrInfo.cpp | 4867 unsigned SReg, unsigned &Lane) { in getCorrespondingDRegAndLane()
4898 unsigned Lane, unsigned &ImplicitSReg) { in getImplicitSPRUseForDPRUse()
4926 unsigned Lane; in setExecutionDomain() local
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| D | ARMExpandPseudoInsts.cpp | 672 unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); in ExpandLaneOp() local
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| /external/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 429 unsigned Lane, bool QPR) { in createDupLane()
446 const DebugLoc &DL, unsigned DReg, unsigned Lane, in createExtractSubreg()
493 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) { in createInsertSubreg()
558 unsigned Lane; in optimizeAllLanesPattern() local
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| D | ARMBaseInstrInfo.cpp | 4218 unsigned SReg, unsigned &Lane) { in getCorrespondingDRegAndLane()
4249 unsigned Lane, unsigned &ImplicitSReg) { in getImplicitSPRUseForDPRUse()
4277 unsigned Lane; in setExecutionDomain() local
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| D | ARMExpandPseudoInsts.cpp | 525 unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); in ExpandLaneOp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 1335 auto GetSwizzleSrcs = [](size_t I, const SDValue &Lane) { in LowerBUILD_VECTOR()
1383 const SDValue &Lane = Op->getOperand(I); in LowerBUILD_VECTOR() local
1420 IsLaneConstructed = [&, Swizzled](size_t I, const SDValue &Lane) { in LowerBUILD_VECTOR()
1425 for (const SDValue &Lane : Op->op_values()) { in LowerBUILD_VECTOR() local
1435 IsLaneConstructed = [&](size_t _, const SDValue &Lane) { in LowerBUILD_VECTOR()
1454 IsLaneConstructed = [&](size_t _, const SDValue &Lane) { in LowerBUILD_VECTOR()
1461 const SDValue &Lane = Op->getOperand(I); in LowerBUILD_VECTOR() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 200 unsigned Lane = (Offset / 4) % 64; in getSpilledReg() local
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| D | SIMachineFunctionInfo.h | 125 int Lane; member
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Vectorize/ |
| D | SLPVectorizer.cpp | 766 OperandData &getData(unsigned OpIdx, unsigned Lane) { in getData()
779 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; in clearUsed() local
785 void swap(unsigned OpIdx1, unsigned OpIdx2, unsigned Lane) { in swap()
1013 getBestOperand(unsigned OpIdx, int Lane, int LastLane, in getBestOperand()
1090 for (unsigned Lane = 0, NumLanes = getNumLanes(); Lane != NumLanes; in getBestLaneToStartReordering() local
1131 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in appendOperandsOfVL() local
1171 bool shouldBroadcast(Value *Op, unsigned OpIdx, unsigned Lane) { in shouldBroadcast()
1209 for (unsigned Lane = 0, Lanes = getNumLanes(); Lane != Lanes; ++Lane) in getVL() local
1281 int Lane = FirstLane + Direction * Distance; in reorder() local
1491 for (unsigned Lane = 0, E = Scalars.size(); Lane != E; ++Lane) in setOperand() local
[all …]
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| D | VPlanSLP.cpp | 316 for (unsigned Lane = 1, E = MultiNodeOps[0].second.size(); Lane < E; ++Lane) { in reorderMultiNodeOps() local
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| D | VPlan.cpp | 264 for (unsigned Lane = 0, VF = State->VF; Lane < VF; ++Lane) { in execute() local
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| D | LoopVectorize.cpp | 1779 Value *VectorLoopVal, unsigned Part, unsigned Lane) { in recordVectorLoopValueForInductionCast()
1989 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { in buildScalarSteps() local
2057 for (unsigned Lane = 0; Lane < VF; ++Lane) in getOrCreateVectorValue() local
4174 for (unsigned Lane = 0; Lane < Lanes; ++Lane) { in widenPHIInstruction() local
7440 for (unsigned Lane = 0; Lane < EndLane; ++Lane) in execute() local
7448 unsigned Lane = State.Instance->Lane; in execute() local
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| D | VPlan.h | 89 unsigned Lane; member
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | InterleavedAccessPass.cpp | 221 unsigned Lane = J * Factor + I; in isReInterleaveMask() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InterleavedAccess.cpp | 440 for (int Lane = 0; Lane < LaneCount; Lane++) in createShuffleStride() local
615 int Lane = (VectorWidth / 128 > 0) ? VectorWidth / 128 : 1; in group2Shuffle() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 1694 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in SimplifyDemandedVectorElts() local
1709 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) { in SimplifyDemandedVectorElts() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3063 unsigned Lane = MI.getOperand(2).getImm(); in emitCOPY_FW() local
3108 unsigned Lane = MI.getOperand(2).getImm() * 2; in emitCOPY_FD() local
3138 unsigned Lane = MI.getOperand(2).getImm(); in emitINSERT_FW() local
3174 unsigned Lane = MI.getOperand(2).getImm(); in emitINSERT_FD() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3177 unsigned Lane = MI.getOperand(2).getImm(); in emitCOPY_FW() local
3222 unsigned Lane = MI.getOperand(2).getImm() * 2; in emitCOPY_FD() local
3252 unsigned Lane = MI.getOperand(2).getImm(); in emitINSERT_FW() local
3288 unsigned Lane = MI.getOperand(2).getImm(); in emitINSERT_FD() local
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| /external/llvm/lib/Transforms/Vectorize/ |
| D | SLPVectorizer.cpp | 501 int Lane; member
924 for (int Lane = 0, LE = Entry->Scalars.size(); Lane != LE; ++Lane) { in buildTree() local
2149 for (unsigned Lane = 0, LE = VL.size(); Lane != LE; ++Lane) { in Gather() local
2636 Value *Lane = Builder.getInt32(ExternalUse.Lane); in vectorizeTree() local
2683 for (int Lane = 0, LE = Entry->Scalars.size(); Lane != LE; ++Lane) { in vectorizeTree() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 546 unsigned Lane, in spillVGPRtoAGPR()
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| /external/llvm/lib/Analysis/ |
| D | ConstantFolding.cpp | 1850 SmallVector<Constant *, 4> Lane(Operands.size()); in ConstantFoldVectorCall() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5472 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, dl, MVT::i64); in GeneratePerfectShuffle() local
5595 int Lane = SVN->getSplatIndex(); in LowerVECTOR_SHUFFLE() local
6058 for (SDValue Lane : Op->ops()) { in NormalizeBuildVector() local
6349 SDValue Lane = Value.getOperand(1); in LowerBUILD_VECTOR() local
8146 SDValue Lane = Op1.getOperand(1); in tryCombineFixedPointConvert() local
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| /external/gemmlowp/meta/generators/ |
| D | neon_emitter.py | 825 def Lane(self, bits, value, lane): member in NeonEmitter
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7103 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, dl, MVT::i64); in GeneratePerfectShuffle() local
7226 int Lane = SVN->getSplatIndex(); in LowerVECTOR_SHUFFLE() local
7806 for (SDValue Lane : Op->ops()) { in NormalizeBuildVector() local
8028 SDValue Lane = Value.getOperand(1); in LowerBUILD_VECTOR() local
10450 SDValue Lane = Op1.getOperand(1); in tryCombineFixedPointConvert() local
11504 SDValue Lane; in performPostLD1Combine() local
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