1 /* Capstone Disassembly Engine */
2 /* M68K Backend by Daniel Collin <daniel@collin.com> 2015-2016 */
3
4 #ifdef _MSC_VER
5 // Disable security warnings for strcat & sprintf
6 #ifndef _CRT_SECURE_NO_WARNINGS
7 #define _CRT_SECURE_NO_WARNINGS
8 #endif
9
10 //Banned API Usage : strcat / sprintf is a Banned API as listed in dontuse.h for
11 //security purposes.
12 #pragma warning(disable:28719)
13 #endif
14
15 #include <stdio.h> // DEBUG
16 #include <stdlib.h>
17 #include <string.h>
18
19 #include "M68KInstPrinter.h"
20
21 #include "M68KDisassembler.h"
22
23 #include "../../cs_priv.h"
24 #include "../../utils.h"
25
26 #include "../../MCInst.h"
27 #include "../../MCInstrDesc.h"
28 #include "../../MCRegisterInfo.h"
29
30 #ifndef CAPSTONE_DIET
31 static const char* s_spacing = " ";
32
33 static const char* s_reg_names[] = {
34 "invalid",
35 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
36 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
37 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7",
38 "pc",
39 "sr", "ccr", "sfc", "dfc", "usp", "vbr", "cacr",
40 "caar", "msp", "isp", "tc", "itt0", "itt1", "dtt0",
41 "dtt1", "mmusr", "urp", "srp",
42
43 "fpcr", "fpsr", "fpiar",
44 };
45
46 static const char* s_instruction_names[] = {
47 "invalid",
48 "abcd", "add", "adda", "addi", "addq", "addx", "and", "andi", "asl", "asr", "bhs", "blo", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc",
49 "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble", "bra", "bsr", "bchg", "bclr", "bset", "btst", "bfchg", "bfclr", "bfexts", "bfextu", "bfffo", "bfins",
50 "bfset", "bftst", "bkpt", "callm", "cas", "cas2", "chk", "chk2", "clr", "cmp", "cmpa", "cmpi", "cmpm", "cmp2", "cinvl", "cinvp", "cinva", "cpushl", "cpushp",
51 "cpusha", "dbt", "dbf", "dbhi", "dbls", "dbcc", "dbcs", "dbne", "dbeq", "dbvc", "dbvs", "dbpl", "dbmi", "dbge", "dblt", "dbgt", "dble", "dbra",
52 "divs", "divsl", "divu", "divul", "eor", "eori", "exg", "ext", "extb", "fabs", "fsabs", "fdabs", "facos", "fadd", "fsadd", "fdadd", "fasin",
53 "fatan", "fatanh", "fbf", "fbeq", "fbogt", "fboge", "fbolt", "fbole", "fbogl", "fbor", "fbun", "fbueq", "fbugt", "fbuge", "fbult", "fbule", "fbne", "fbt",
54 "fbsf", "fbseq", "fbgt", "fbge", "fblt", "fble", "fbgl", "fbgle", "fbngle", "fbngl", "fbnle", "fbnlt", "fbnge", "fbngt", "fbsne", "fbst", "fcmp", "fcos",
55 "fcosh", "fdbf", "fdbeq", "fdbogt", "fdboge", "fdbolt", "fdbole", "fdbogl", "fdbor", "fdbun", "fdbueq", "fdbugt", "fdbuge", "fdbult", "fdbule", "fdbne",
56 "fdbt", "fdbsf", "fdbseq", "fdbgt", "fdbge", "fdblt", "fdble", "fdbgl", "fdbgle", "fdbngle", "fdbngl", "fdbnle", "fdbnlt", "fdbnge", "fdbngt", "fdbsne",
57 "fdbst", "fdiv", "fsdiv", "fddiv", "fetox", "fetoxm1", "fgetexp", "fgetman", "fint", "fintrz", "flog10", "flog2", "flogn", "flognp1", "fmod", "fmove",
58 "fsmove", "fdmove", "fmovecr", "fmovem", "fmul", "fsmul", "fdmul", "fneg", "fsneg", "fdneg", "fnop", "frem", "frestore", "fsave", "fscale", "fsgldiv",
59 "fsglmul", "fsin", "fsincos", "fsinh", "fsqrt", "fssqrt", "fdsqrt", "fsf", "fseq", "fsogt", "fsoge", "fsolt", "fsole", "fsogl", "fsor", "fsun", "fsueq",
60 "fsugt", "fsuge", "fsult", "fsule", "fsne", "fst", "fssf", "fsseq", "fsgt", "fsge", "fslt", "fsle", "fsgl", "fsgle", "fsngle",
61 "fsngl", "fsnle", "fsnlt", "fsnge", "fsngt", "fssne", "fsst", "fsub", "fssub", "fdsub", "ftan", "ftanh", "ftentox", "ftrapf", "ftrapeq", "ftrapogt",
62 "ftrapoge", "ftrapolt", "ftrapole", "ftrapogl", "ftrapor", "ftrapun", "ftrapueq", "ftrapugt", "ftrapuge", "ftrapult", "ftrapule", "ftrapne", "ftrapt",
63 "ftrapsf", "ftrapseq", "ftrapgt", "ftrapge", "ftraplt", "ftraple", "ftrapgl", "ftrapgle", "ftrapngle", "ftrapngl", "ftrapnle", "ftrapnlt", "ftrapnge",
64 "ftrapngt", "ftrapsne", "ftrapst", "ftst", "ftwotox", "halt", "illegal", "jmp", "jsr", "lea", "link", "lpstop", "lsl", "lsr", "move", "movea", "movec",
65 "movem", "movep", "moveq", "moves", "move16", "muls", "mulu", "nbcd", "neg", "negx", "nop", "not", "or", "ori", "pack", "pea", "pflush", "pflusha",
66 "pflushan", "pflushn", "ploadr", "ploadw", "plpar", "plpaw", "pmove", "pmovefd", "ptestr", "ptestw", "pulse", "rems", "remu", "reset", "rol", "ror",
67 "roxl", "roxr", "rtd", "rte", "rtm", "rtr", "rts", "sbcd", "st", "sf", "shi", "sls", "scc", "shs", "scs", "slo", "sne", "seq", "svc", "svs", "spl", "smi",
68 "sge", "slt", "sgt", "sle", "stop", "sub", "suba", "subi", "subq", "subx", "swap", "tas", "trap", "trapv", "trapt", "trapf", "traphi", "trapls",
69 "trapcc", "traphs", "trapcs", "traplo", "trapne", "trapeq", "trapvc", "trapvs", "trappl", "trapmi", "trapge", "traplt", "trapgt", "traple", "tst", "unlk", "unpk",
70 };
71 #endif
72
73
74 #ifndef CAPSTONE_DIET
getRegName(m68k_reg reg)75 static const char* getRegName(m68k_reg reg)
76 {
77 return s_reg_names[(int)reg];
78 }
79
printRegbitsRange(char * buffer,uint32_t data,const char * prefix)80 static void printRegbitsRange(char* buffer, uint32_t data, const char* prefix)
81 {
82 unsigned int first = 0;
83 unsigned int run_length = 0;
84 int i;
85
86 for (i = 0; i < 8; ++i) {
87 if (data & (1 << i)) {
88 first = i;
89 run_length = 0;
90
91 while (i < 7 && (data & (1 << (i + 1)))) {
92 i++;
93 run_length++;
94 }
95
96 if (buffer[0] != 0)
97 strcat(buffer, "/");
98
99 sprintf(buffer + strlen(buffer), "%s%d", prefix, first);
100 if (run_length > 0)
101 sprintf(buffer + strlen(buffer), "-%s%d", prefix, first + run_length);
102 }
103 }
104 }
105
registerBits(SStream * O,const cs_m68k_op * op)106 static void registerBits(SStream* O, const cs_m68k_op* op)
107 {
108 char buffer[128];
109 unsigned int data = op->register_bits;
110
111 buffer[0] = 0;
112
113 if (!data) {
114 SStream_concat(O, "%s", "#$0");
115 return;
116 }
117
118 printRegbitsRange(buffer, data & 0xff, "d");
119 printRegbitsRange(buffer, (data >> 8) & 0xff, "a");
120 printRegbitsRange(buffer, (data >> 16) & 0xff, "fp");
121
122 SStream_concat(O, "%s", buffer);
123 }
124
registerPair(SStream * O,const cs_m68k_op * op)125 static void registerPair(SStream* O, const cs_m68k_op* op)
126 {
127 SStream_concat(O, "%s:%s", s_reg_names[M68K_REG_D0 + op->reg_pair.reg_0],
128 s_reg_names[M68K_REG_D0 + op->reg_pair.reg_1]);
129 }
130
printAddressingMode(SStream * O,unsigned int pc,const cs_m68k * inst,const cs_m68k_op * op)131 static void printAddressingMode(SStream* O, unsigned int pc, const cs_m68k* inst, const cs_m68k_op* op)
132 {
133 switch (op->address_mode) {
134 case M68K_AM_NONE:
135 switch (op->type) {
136 case M68K_OP_REG_BITS:
137 registerBits(O, op);
138 break;
139 case M68K_OP_REG_PAIR:
140 registerPair(O, op);
141 break;
142 case M68K_OP_REG:
143 SStream_concat(O, "%s", s_reg_names[op->reg]);
144 break;
145 default:
146 break;
147 }
148 break;
149
150 case M68K_AM_REG_DIRECT_DATA: SStream_concat(O, "d%d", (op->reg - M68K_REG_D0)); break;
151 case M68K_AM_REG_DIRECT_ADDR: SStream_concat(O, "a%d", (op->reg - M68K_REG_A0)); break;
152 case M68K_AM_REGI_ADDR: SStream_concat(O, "(a%d)", (op->reg - M68K_REG_A0)); break;
153 case M68K_AM_REGI_ADDR_POST_INC: SStream_concat(O, "(a%d)+", (op->reg - M68K_REG_A0)); break;
154 case M68K_AM_REGI_ADDR_PRE_DEC: SStream_concat(O, "-(a%d)", (op->reg - M68K_REG_A0)); break;
155 case M68K_AM_REGI_ADDR_DISP: SStream_concat(O, "%s$%x(a%d)", op->mem.disp < 0 ? "-" : "", abs(op->mem.disp), (op->mem.base_reg - M68K_REG_A0)); break;
156 case M68K_AM_PCI_DISP: SStream_concat(O, "$%x(pc)", pc + 2 + op->mem.disp); break;
157 case M68K_AM_ABSOLUTE_DATA_SHORT: SStream_concat(O, "$%x.w", op->imm); break;
158 case M68K_AM_ABSOLUTE_DATA_LONG: SStream_concat(O, "$%x.l", op->imm); break;
159 case M68K_AM_IMMEDIATE:
160 if (inst->op_size.type == M68K_SIZE_TYPE_FPU) {
161 #if defined(_KERNEL_MODE)
162 // Issue #681: Windows kernel does not support formatting float point
163 SStream_concat(O, "#<float_point_unsupported>");
164 break;
165 #else
166 if (inst->op_size.fpu_size == M68K_FPU_SIZE_SINGLE)
167 SStream_concat(O, "#%f", op->simm);
168 else if (inst->op_size.fpu_size == M68K_FPU_SIZE_DOUBLE)
169 SStream_concat(O, "#%f", op->dimm);
170 else
171 SStream_concat(O, "#<unsupported>");
172 break;
173 #endif
174 }
175 SStream_concat(O, "#$%x", op->imm);
176 break;
177 case M68K_AM_PCI_INDEX_8_BIT_DISP:
178 SStream_concat(O, "$%x(pc,%s%s.%c)", pc + 2 + op->mem.disp, s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
179 break;
180 case M68K_AM_AREGI_INDEX_8_BIT_DISP:
181 SStream_concat(O, "%s$%x(%s,%s%s.%c)", op->mem.disp < 0 ? "-" : "", abs(op->mem.disp), getRegName(op->mem.base_reg), s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
182 break;
183 case M68K_AM_PCI_INDEX_BASE_DISP:
184 case M68K_AM_AREGI_INDEX_BASE_DISP:
185
186 if (op->address_mode == M68K_AM_PCI_INDEX_BASE_DISP) {
187 SStream_concat(O, "$%x", pc + 2 + op->mem.in_disp);
188 } else {
189 if (op->mem.in_disp > 0)
190 SStream_concat(O, "$%x", op->mem.in_disp);
191 }
192
193 SStream_concat(O, "(");
194
195 if (op->address_mode == M68K_AM_PCI_INDEX_BASE_DISP) {
196 SStream_concat(O, "pc,%s.%c", getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
197 } else {
198 if (op->mem.base_reg != M68K_REG_INVALID)
199 SStream_concat(O, "a%d,%s", op->mem.base_reg - M68K_REG_A0, s_spacing);
200 SStream_concat(O, "%s.%c", getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
201 }
202
203 if (op->mem.scale > 0)
204 SStream_concat(O, "%s*%s%d)", s_spacing, s_spacing, op->mem.scale);
205 else
206 SStream_concat(O, ")");
207 break;
208 // It's ok to just use PCMI here as is as we set base_reg to PC in the disassembler. While this is not strictly correct it makes the code
209 // easier and that is what actually happens when the code is executed anyway.
210
211 case M68K_AM_PC_MEMI_POST_INDEX:
212 case M68K_AM_PC_MEMI_PRE_INDEX:
213 case M68K_AM_MEMI_PRE_INDEX:
214 case M68K_AM_MEMI_POST_INDEX:
215 SStream_concat(O, "([");
216
217 if (op->address_mode == M68K_AM_PC_MEMI_POST_INDEX || op->address_mode == M68K_AM_PC_MEMI_PRE_INDEX) {
218 SStream_concat(O, "$%x", pc + 2 + op->mem.in_disp);
219 } else {
220 if (op->mem.in_disp > 0)
221 SStream_concat(O, "$%x", op->mem.in_disp);
222 }
223
224 if (op->mem.base_reg != M68K_REG_INVALID) {
225 if (op->mem.in_disp > 0)
226 SStream_concat(O, ",%s%s", s_spacing, getRegName(op->mem.base_reg));
227 else
228 SStream_concat(O, "%s", getRegName(op->mem.base_reg));
229 }
230
231 if (op->address_mode == M68K_AM_MEMI_POST_INDEX || op->address_mode == M68K_AM_PC_MEMI_POST_INDEX)
232 SStream_concat(O, "]");
233
234 if (op->mem.index_reg != M68K_REG_INVALID)
235 SStream_concat(O, ",%s%s.%c", s_spacing, getRegName(op->mem.index_reg), op->mem.index_size ? 'l' : 'w');
236
237 if (op->mem.scale > 0)
238 SStream_concat(O, "%s*%s%d", s_spacing, s_spacing, op->mem.scale);
239
240 if (op->address_mode == M68K_AM_MEMI_PRE_INDEX || op->address_mode == M68K_AM_PC_MEMI_PRE_INDEX)
241 SStream_concat(O, "]");
242
243 if (op->mem.out_disp > 0)
244 SStream_concat(O, ",%s$%x", s_spacing, op->mem.out_disp);
245
246 SStream_concat(O, ")");
247 break;
248 case M68K_AM_BRANCH_DISPLACEMENT:
249 SStream_concat(O, "$%x", pc + 2 + op->br_disp.disp);
250 default:
251 break;
252 }
253
254 if (op->mem.bitfield)
255 SStream_concat(O, "{%d:%d}", op->mem.offset, op->mem.width);
256 }
257 #endif
258
259 #define m68k_sizeof_array(array) (int)(sizeof(array)/sizeof(array[0]))
260 #define m68k_min(a, b) (a < b) ? a : b
261
M68K_printInst(MCInst * MI,SStream * O,void * PrinterInfo)262 void M68K_printInst(MCInst* MI, SStream* O, void* PrinterInfo)
263 {
264 #ifndef CAPSTONE_DIET
265 m68k_info *info = (m68k_info *)PrinterInfo;
266 cs_m68k *ext = &info->extension;
267 cs_detail *detail = NULL;
268 int i = 0;
269
270 detail = MI->flat_insn->detail;
271 if (detail) {
272 int regs_read_count = m68k_min(m68k_sizeof_array(detail->regs_read), info->regs_read_count);
273 int regs_write_count = m68k_min(m68k_sizeof_array(detail->regs_write), info->regs_write_count);
274 int groups_count = m68k_min(m68k_sizeof_array(detail->groups), info->groups_count);
275
276 memcpy(&detail->m68k, ext, sizeof(cs_m68k));
277
278 memcpy(&detail->regs_read, &info->regs_read, regs_read_count * sizeof(uint16_t));
279 detail->regs_read_count = regs_read_count;
280
281 memcpy(&detail->regs_write, &info->regs_write, regs_write_count * sizeof(uint16_t));
282 detail->regs_write_count = regs_write_count;
283
284 memcpy(&detail->groups, &info->groups, groups_count);
285 detail->groups_count = groups_count;
286 }
287
288 if (MI->Opcode == M68K_INS_INVALID) {
289 if (ext->op_count)
290 SStream_concat(O, "dc.w $%x", ext->operands[0].imm);
291 else
292 SStream_concat(O, "dc.w $<unknown>");
293 return;
294 }
295
296 SStream_concat0(O, (char*)s_instruction_names[MI->Opcode]);
297
298 switch (ext->op_size.type) {
299 case M68K_SIZE_TYPE_INVALID :
300 break;
301
302 case M68K_SIZE_TYPE_CPU :
303 switch (ext->op_size.cpu_size) {
304 case M68K_CPU_SIZE_BYTE: SStream_concat0(O, ".b"); break;
305 case M68K_CPU_SIZE_WORD: SStream_concat0(O, ".w"); break;
306 case M68K_CPU_SIZE_LONG: SStream_concat0(O, ".l"); break;
307 case M68K_CPU_SIZE_NONE: break;
308 }
309 break;
310
311 case M68K_SIZE_TYPE_FPU :
312 switch (ext->op_size.fpu_size) {
313 case M68K_FPU_SIZE_SINGLE: SStream_concat0(O, ".s"); break;
314 case M68K_FPU_SIZE_DOUBLE: SStream_concat0(O, ".d"); break;
315 case M68K_FPU_SIZE_EXTENDED: SStream_concat0(O, ".x"); break;
316 case M68K_FPU_SIZE_NONE: break;
317 }
318 break;
319 }
320
321 SStream_concat0(O, " ");
322
323 // this one is a bit spacial so we do special things
324
325 if (MI->Opcode == M68K_INS_CAS2) {
326 int reg_value_0, reg_value_1;
327 printAddressingMode(O, info->pc, ext, &ext->operands[0]); SStream_concat0(O, ",");
328 printAddressingMode(O, info->pc, ext, &ext->operands[1]); SStream_concat0(O, ",");
329 reg_value_0 = ext->operands[2].register_bits >> 4;
330 reg_value_1 = ext->operands[2].register_bits & 0xf;
331 SStream_concat(O, "(%s):(%s)", s_reg_names[M68K_REG_D0 + reg_value_0], s_reg_names[M68K_REG_D0 + reg_value_1]);
332 return;
333 }
334
335 for (i = 0; i < ext->op_count; ++i) {
336 printAddressingMode(O, info->pc, ext, &ext->operands[i]);
337 if ((i + 1) != ext->op_count)
338 SStream_concat(O, ",%s", s_spacing);
339 }
340 #endif
341 }
342
M68K_reg_name(csh handle,unsigned int reg)343 const char* M68K_reg_name(csh handle, unsigned int reg)
344 {
345 #ifdef CAPSTONE_DIET
346 return NULL;
347 #else
348 if (reg >= ARR_SIZE(s_reg_names)) {
349 return NULL;
350 }
351 return s_reg_names[(int)reg];
352 #endif
353 }
354
M68K_get_insn_id(cs_struct * h,cs_insn * insn,unsigned int id)355 void M68K_get_insn_id(cs_struct* h, cs_insn* insn, unsigned int id)
356 {
357 insn->id = id; // These id's matches for 68k
358 }
359
M68K_insn_name(csh handle,unsigned int id)360 const char* M68K_insn_name(csh handle, unsigned int id)
361 {
362 #ifdef CAPSTONE_DIET
363 return NULL;
364 #else
365 return s_instruction_names[id];
366 #endif
367 }
368
369 #ifndef CAPSTONE_DIET
370 static name_map group_name_maps[] = {
371 { M68K_GRP_INVALID , NULL },
372 { M68K_GRP_JUMP, "jump" },
373 { M68K_GRP_RET , "ret" },
374 { M68K_GRP_IRET, "iret" },
375 { M68K_GRP_BRANCH_RELATIVE, "branch_relative" },
376 };
377 #endif
378
M68K_group_name(csh handle,unsigned int id)379 const char *M68K_group_name(csh handle, unsigned int id)
380 {
381 #ifndef CAPSTONE_DIET
382 return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
383 #else
384 return NULL;
385 #endif
386 }
387
388