Searched defs:MI2 (Results 1 – 16 of 16) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MicroMipsSizeReduction.cpp | 398 static bool ConsecutiveInstr(MachineInstr *MI1, MachineInstr *MI2) { in ConsecutiveInstr()
465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local
622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local
695 MachineInstr *MI2, in ReplaceInstruction()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | DFAPacketizer.cpp | 302 const MachineInstr &MI2, in alias()
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| D | TargetInstrInfo.cpp | 677 MachineInstr *MI2 = nullptr; in hasReassociableOperands() local
692 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMIPeephole.cpp | 413 MachineInstr *MI2 = nullptr; in eliminateTruncSeq() local
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| /external/python/pybind11/tests/ |
| D | test_multiple_inheritance.py | 69 class MI2(B1, m.Base1, m.Base2): class
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| /external/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 365 const MachineInstr &MI2, in getAddrDispShift()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 401 const MachineInstr &MI2, in getAddrDispShift()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.cpp | 155 MachineInstr &MI2 = *SI.getSUnit()->getInstr(); in apply() local
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| D | HexagonVLIWPacketizer.cpp | 960 MachineInstr &MI2) { in arePredicatesComplements()
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| /external/clang/test/Analysis/ |
| D | padding_cpp.cpp | 102 class MI2 : public PaddedA, public InnerPaddedB { // xxxexpected-warning{{Excessive padding in 'cla… class
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| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 571 MachineInstr *MI2 = nullptr; in hasReassociableOperands() local
586 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling() local
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| D | MachineInstr.cpp | 905 static bool hasIdenticalMMOs(const MachineInstr &MI1, const MachineInstr &MI2) { in hasIdenticalMMOs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 460 MachineInstr *MI2 = *I2; in hoistAndMergeSGPRInits() local
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| D | AMDGPUSubtarget.cpp | 769 MachineInstr &MI2 = *SU.getInstr(); in apply() local
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| D | SIInstrInfo.cpp | 403 const MachineInstr &MI2, in memOpsHaveSameBasePtr()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 845 MachineInstr &MI2) { in arePredicatesComplements()
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