Searched defs:MaskLo (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1105 SDValue MaskLo, MaskHi; in SplitVecRes_MLOAD() local
1167 SDValue MaskLo, MaskHi; in SplitVecRes_MGATHER() local
1682 SDValue MaskLo, MaskHi; in SplitVecOp_MGATHER() local
1759 SDValue MaskLo, MaskHi; in SplitVecOp_MSTORE() local
1823 SDValue MaskLo, MaskHi; in SplitVecOp_MSCATTER() local
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| D | TargetLowering.cpp | 938 APInt MaskLo = NewMask.getLoBits(HalfBitWidth).trunc(HalfBitWidth); in SimplifyDemandedBits() local
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| D | DAGCombiner.cpp | 5347 SDValue MaskLo, MaskHi, Lo, Hi; in visitMSCATTER() local
5408 SDValue MaskLo, MaskHi, Lo, Hi; in visitMSTORE() local
5485 SDValue MaskLo, MaskHi, Lo, Hi; in visitMGATHER() local
5560 SDValue MaskLo, MaskHi, Lo, Hi; in visitMLOAD() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1548 SDValue MaskLo, MaskHi; in SplitVecRes_MLOAD() local
1616 SDValue MaskLo, MaskHi; in SplitVecRes_MGATHER() local
2249 SDValue MaskLo, MaskHi; in SplitVecOp_MGATHER() local
2330 SDValue MaskLo, MaskHi; in SplitVecOp_MSTORE() local
2392 SDValue MaskLo, MaskHi; in SplitVecOp_MSCATTER() local
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| D | TargetLowering.cpp | 1659 APInt MaskLo = DemandedBits.getLoBits(HalfBitWidth).trunc(HalfBitWidth); in SimplifyDemandedBits() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 1676 Register MaskLo = MRI->createVirtualRegister(&RegRC); in selectG_PTR_MASK() local
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| D | AMDGPURegisterBankInfo.cpp | 1912 Register MaskLo = B.buildConstant(S32, 0xffff).getReg(0); in applyMappingImpl() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15505 static const int MaskLo[] = { 0, 0, 2, 2 }; in LowerVSETCC() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 21701 static const int MaskLo[] = { 0, 0, 2, 2 }; in LowerVSETCC() local
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