| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.cc | 66 ___ Mov(reg_x(dest.AsArm64().AsXRegister()), reg_x(TR)); in GetCurrentThread() local
204 ___ Mov(scratch, reg_x(SP)); in StoreStackPointerToThread() local
214 ___ Mov(reg_x(dest), value); in LoadImmediate() local
222 ___ Mov(temp, value); in LoadImmediate() local
559 ___ Mov(reg_w(dst.AsOverlappingWRegister()), reg_w(src.AsWRegister())); in Move() local
562 ___ Mov(reg_x(dst.AsXRegister()), reg_x(src.AsXRegister())); in Move() local
564 ___ Mov(reg_x(dst.AsXRegister()), reg_x(src.AsOverlappingXRegister())); in Move() local
569 ___ Mov(reg_w(dst.AsWRegister()), reg_w(src.AsWRegister())); in Move() local
584 ___ Mov(reg_x(dst.AsXRegister()), value); in Move() local
724 ___ Mov(scratch2, kNativeStateValue); in TryToTransitionFromRunnableToNative() local
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| /art/compiler/optimizing/ |
| D | code_generator_arm_vixl.cc | 537 __ Mov(calling_convention.GetRegisterAt(0), type_index.index_); in EmitNativeCode() local
591 __ Mov(calling_convention.GetRegisterAt(0), string_index.index_); in EmitNativeCode() local
677 __ Mov(calling_convention.GetRegisterAt(0), in EmitNativeCode() local
818 __ Mov(free_reg, index_reg); in EmitNativeCode() local
874 __ Mov(calling_convention.GetRegisterAt(2), offset_); in EmitNativeCode() local
978 __ Mov(vixl::aarch32::Register(R2), arm_codegen->GetFrameSize()); in EmitNativeCode() local
1140 __ Mov(out, in); in GenerateDataProcInstruction() local
1441 __ Mov(LeaveFlags, operand_low.GetBaseRegister(), value_low); in GenerateLongTestConstant() local
1596 __ Mov(LeaveFlags, out, 0); in GenerateConditionGeneric() local
1611 __ Mov(out, 1); in GenerateConditionGeneric() local
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| D | code_generator_arm64.cc | 289 __ Mov(calling_convention.GetRegisterAt(0).W(), type_index.index_); in EmitNativeCode() local
344 __ Mov(calling_convention.GetRegisterAt(0).W(), string_index.index_); in EmitNativeCode() local
494 __ Mov(calling_convention.GetRegisterAt(0), in EmitNativeCode() local
658 __ Mov(free_reg.W(), index_reg); in EmitNativeCode() local
794 __ Mov(calling_convention.GetRegisterAt(0), XRegisterFrom(out_)); in EmitNativeCode() local
828 __ Mov(vixl::aarch64::x4, arm64_codegen->GetFrameSize()); in EmitNativeCode() local
1216 __ Mov(temp, address + offset.Int32Value()); in GenerateMethodEntryExitHook() local
1446 __ Mov(RegisterFrom(location, DataType::Type::kInt32), value); in MoveConstant() local
1563 __ Mov(Register(destination), constant->AsIntConstant()->GetValue()); in MoveConstant() local
1565 __ Mov(Register(destination), constant->AsLongConstant()->GetValue()); in MoveConstant() local
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| D | code_generator_vector_arm64_sve.cc | 916 __ Mov(dst.V16B(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
920 __ Mov(dst.V8H(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
923 __ Mov(dst.V4S(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
926 __ Mov(dst.V2D(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
1300 __ Mov(ZRegisterFrom(destination), ZRegisterFrom(source)); in MoveSIMDRegToSIMDReg() local
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| D | intrinsics_arm_vixl.cc | 723 __ Mov(temp1, value_offset); in GenerateStringCompareToLoop() local
827 __ Mov(temp1, str); in GenerateStringCompareToLoop() local
828 __ Mov(temp2, arg); in GenerateStringCompareToLoop() local
1062 __ Mov(temp1, value_offset); in VisitStringEquals() local
1079 __ Mov(out, 1); in VisitStringEquals() local
1084 __ Mov(out, 0); in VisitStringEquals() local
1128 __ Mov(tmp_reg, 0); in GenerateVisitStringIndexOf() local
2129 __ Mov(temp, 0x80000000); // Modified immediate. in GenHighestOneBit() local
2142 __ Mov(LeaveFlags, temp, 0); in GenHighestOneBit() local
2154 __ Mov(temp, 0x80000000); // Modified immediate. in GenHighestOneBit() local
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| D | code_generator_vector_arm64_neon.cc | 1047 __ Mov(dst.V16B(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
1052 __ Mov(dst.V8H(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
1056 __ Mov(dst.V4S(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
1060 __ Mov(dst.V2D(), 0, InputRegisterAt(instruction, 0)); in VisitVecSetScalars() local
1567 __ Mov(QRegisterFrom(destination), QRegisterFrom(source)); in MoveSIMDRegToSIMDReg() local
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| D | intrinsics_arm64.cc | 442 __ Mov(dst, UINT64_C(1) << high_bit); // MOV (bitmask immediate) in GenHighestOneBit() local
966 __ Mov(temp.W(), value.W()); in GenUnsafePut() local
1385 __ Mov(old_value_, expected_); in EmitNativeCode() local
1765 __ Mov(temp1, value_offset); in VisitStringCompareTo() local
2068 __ Mov(temp1, value_offset); in VisitStringEquals() local
2087 __ Mov(out, 1); in VisitStringEquals() local
2092 __ Mov(out, 0); in VisitStringEquals() local
2130 __ Mov(tmp_reg, 0); in GenerateVisitStringIndexOf() local
2517 __ Mov(num_chr, tmp1); in VisitStringGetCharsNoCheck() local
2552 __ Mov(num_chr, tmp1); in VisitStringGetCharsNoCheck() local
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| /art/compiler/utils/arm/ |
| D | jni_macro_assembler_arm_vixl.cc | 744 ___ Mov(AsVIXLRegister(dst), AsVIXLRegister(src)); in Move() local
770 ___ Mov(AsVIXLRegisterPairLow(dst), AsVIXLRegisterPairLow(src)); in Move() local
771 ___ Mov(AsVIXLRegisterPairHigh(dst), AsVIXLRegisterPairHigh(src)); in Move() local
773 ___ Mov(AsVIXLRegisterPairHigh(dst), AsVIXLRegisterPairHigh(src)); in Move() local
774 ___ Mov(AsVIXLRegisterPairLow(dst), AsVIXLRegisterPairLow(src)); in Move() local
786 ___ Mov(AsVIXLRegister(dst), static_cast<uint32_t>(value)); in Move() local
899 ___ Mov(AsVIXLRegister(dest.AsArm()), tr); in GetCurrentThread() local
922 ___ Mov(scratch2, kNativeStateValue); in TryToTransitionFromRunnableToNative() local
1080 ___ Mov(scratch, static_cast<uint32_t>(address)); in TestByteAndJumpIfNotZero() local
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| D | assembler_arm_vixl.cc | 102 ___ Mov(rd, value); in LoadImmediate() local
155 ___ Mov(temp, offset); in AdjustLoadStoreOffset() local
435 ___ Mov(rd, rn); in AddConstant() local
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