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Searched defs:RB (Results 1 – 25 of 32) sorted by relevance

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/external/clang/lib/Rewrite/
DHTMLRewrite.cpp57 void html::HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E, in HighlightRange()
115 RewriteBuffer &RB = R.getEditBuffer(FID); in EscapeText() local
208 static void AddLineNumber(RewriteBuffer &RB, unsigned LineNo, in AddLineNumber()
232 RewriteBuffer &RB = R.getEditBuffer(FID); in AddLineNumbers() local
358 RewriteBuffer &RB = R.getEditBuffer(FID); in SyntaxHighlight() local
DRewriter.cpp143 const RewriteBuffer &RB = I->second; in getRangeSize() local
195 const RewriteBuffer &RB = I->second; in getRewrittenText() local
381 RewriteBuffer &RB = getEditBuffer(FID); in IncreaseIndentation() local
/external/linux-kselftest/tools/testing/selftests/powerpc/include/
Dinstructions.h9 #define __COPY(RA, RB, L) \ argument
11 #define COPY(RA, RB, L) \ argument
33 #define __PASTE(RA, RB, L, RC) \ argument
35 #define PASTE(RA, RB, L, RC) \ argument
/external/clang/lib/Frontend/Rewrite/
DRewriteMacros.cpp95 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID()); in RewriteMacrosInInput() local
/external/clang/test/Layout/
Dms-x86-alias-avoidance-padding.cpp302 struct RB { char c; }; argument
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp332 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
363 getMinClassForRegBank(const RegisterBank &RB, unsigned SizeInBits, in getMinClassForRegBank()
1011 const RegisterBank &RB = *RBI.getRegBank(LHS, MRI, TRI); in selectCompareBranch() local
1442 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in select() local
1593 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
1851 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); in select() local
1924 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
1968 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
2811 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); in selectMergeValues() local
3208 getInsertVecEltOpInfo(const RegisterBank &RB, unsigned EltSize) { in getInsertVecEltOpInfo()
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DAArch64RegisterBankInfo.cpp95 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \ in AArch64RegisterBankInfo() argument
/external/pdfium/third_party/libtiff/
Dtif_color.c191 #define Code2V(c, RB, RW, CR) \ argument
/external/clang/tools/arcmt-test/
Darcmt-test.cpp144 for (const auto &RB : PPOpts.RemappedFileBuffers) in printResult() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DRegisterBankInfo.cpp93 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getRegBank() local
140 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in constrainGenericRegister() local
DCSEInfo.cpp347 auto *RB = MRI.getRegBankOrNull(Reg); in addNodeIDMachineOperand() local
/external/clang/lib/Frontend/
DASTUnit.cpp251 for (const auto &RB : PPOpts.RemappedFileBuffers) in ~ASTUnit() local
1216 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in ComputePreamble() local
1398 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in getMainBufferWithPrecompiledPreamble() local
2041 for (const auto &RB : PPOpts.RemappedFileBuffers) in Reparse() local
DCompilerInstance.cpp253 for (const auto &RB : InitOpts.RemappedFileBuffers) { in InitializeFileRemapping() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.cpp87 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in isVCC() local
190 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in selectPHI() local
1311 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getArtifactRegBank() local
1433 const RegisterBank *RB = MRI->getRegBankOrNull(I.getOperand(0).getReg()); in selectG_CONSTANT() local
DSIRegisterInfo.cpp1766 const RegisterBank &RB, in getRegClassForSizeOnBank()
1818 if (const RegisterBank *RB = RCOrRB.dyn_cast<const RegisterBank*>()) in getConstrainedRegClassForOperand() local
DAMDGPURegisterBankInfo.cpp51 MachineRegisterInfo &MRI_, const RegisterBank *RB) in ApplyRegBankMapping()
108 const RegisterBank *RB = NewBank; in applyBank() local
/external/skia/gm/
Dimage.cpp123 RB = W * 4 + 8, enumerator
/external/llvm/lib/CodeGen/GlobalISel/
DRegisterBankInfo.cpp70 RegisterBank &RB = getRegBank(ID); in addRegBankCoverage() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstructionSelector.cpp395 const RegisterBank &RB, in getLoadStoreOp()
509 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonEarlyIfConv.cpp473 const MachineOperand &RB = MI.getOperand(3); in computePhiCost() local
DHexagonVLIWPacketizer.cpp251 MachineBasicBlock::iterator RB = Begin; in runOnMachineFunction() local
/external/llvm/lib/Target/Hexagon/
DHexagonVLIWPacketizer.cpp221 MachineBasicBlock::iterator RB = Begin; in runOnMachineFunction() local
/external/clang/lib/AST/
DStmt.cpp283 SourceLocation LB, SourceLocation RB) in CompoundStmt()
/external/lua/src/
Dlvm.c1036 #define RB(i) (base+GETARG_B(i)) macro
/external/swiftshader/src/Device/
DBC_Decoder.cpp1112 const int RB; // Rotation bits member

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