| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l4xx.h | 216 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) argument
218 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) argument
220 #define READ_BIT(REG, BIT) ((REG) & (BIT)) argument
222 #define CLEAR_REG(REG) ((REG) = (0x0)) argument
224 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) argument
226 #define READ_REG(REG) ((REG)) argument
228 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |… argument
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l4xx.h | 216 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) argument
218 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) argument
220 #define READ_BIT(REG, BIT) ((REG) & (BIT)) argument
222 #define CLEAR_REG(REG) ((REG) = (0x0)) argument
224 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) argument
226 #define READ_REG(REG) ((REG)) argument
228 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |… argument
|
| /external/arm-optimized-routines/string/arm/ |
| D | strcpy.c | 18 #define magic1(REG) "#0x01010101" argument
19 #define magic2(REG) "#0x80808080" argument
21 #define magic1(REG) #REG argument
22 #define magic2(REG) #REG ", lsl #7" argument
|
| /external/arm-trusted-firmware/drivers/arm/gic/v3/ |
| D | gicv3_private.h | 28 #define BIT_NUM(REG, id) \ argument
37 #define GICD_OFFSET_8(REG, id) \ argument
42 #define GICD_OFFSET(REG, id) \ argument
48 #define GICD_OFFSET_64(REG, id) \ argument
55 #define GICD_OFFSET_8(REG, id) \ argument
58 #define GICD_OFFSET(REG, id) \ argument
61 #define GICD_OFFSET_64(REG, id) \ argument
69 #define GICD_READ(REG, base, id) \ argument
72 #define GICD_READ_64(REG, base, id) \ argument
75 #define GICD_WRITE_8(REG, base, id, val) \ argument
[all …]
|
| D | gicv3_main.c | 48 #define RESTORE_GICD_REGS(base, ctx, intr_num, reg, REG) \ argument
58 #define SAVE_GICD_REGS(base, ctx, intr_num, reg, REG) \ argument
68 #define RESTORE_GICD_EREGS(base, ctx, intr_num, reg, REG) \ argument
79 #define SAVE_GICD_EREGS(base, ctx, intr_num, reg, REG) \ argument
89 #define SAVE_GICD_EREGS(base, ctx, intr_num, reg, REG) argument
90 #define RESTORE_GICD_EREGS(base, ctx, intr_num, reg, REG) argument
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/nx-gzip/include/ |
| D | nxu.h | 428 #define getnn(ST, REG) ((be32toh(ST.REG) >> (31-REG##_offset)) \ argument
430 #define getpnn(ST, REG) ((be32toh((ST)->REG) >> (31-REG##_offset)) \ argument
432 #define get32(ST, REG) (be32toh(ST.REG)) argument
433 #define getp32(ST, REG) (be32toh((ST)->REG)) argument
434 #define get64(ST, REG) (be64toh(ST.REG)) argument
435 #define getp64(ST, REG) (be64toh((ST)->REG)) argument
437 #define unget32(ST, REG) (get32(ST, REG) & ~((REG##_mask) \ argument
441 #define ungetp32(ST, REG) (getp32(ST, REG) & ~((REG##_mask) \ argument
452 #define putnn(ST, REG, X) (ST.REG = htobe32(unget32(ST, REG) | (((X) \ argument
454 #define putpnn(ST, REG, X) ((ST)->REG = htobe32(ungetp32(ST, REG) \ argument
[all …]
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/tile/ |
| D | tile.S | 163 #define LOAD_REG(REG, PTR) \ argument
204 #define STORE_REG(REG, PTR) \ argument
|
| /external/libffi/src/tile/ |
| D | tile.S | 163 #define LOAD_REG(REG, PTR) \ argument
204 #define STORE_REG(REG, PTR) \ argument
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
| D | stm32l4xx_hal_def.h | 76 #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) argument
77 #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) argument
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
| D | stm32l4xx_hal_def.h | 76 #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) argument
77 #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) argument
|
| /external/ethtool/ |
| D | fec.c | 8 #define REG(_reg, _name, _val) \ macro
|
| D | dsa.c | 8 #define REG(_reg, _name, _val) \ macro
|
| /external/ltp/testcases/kernel/syscalls/nftw/ |
| D | nftw.h | 62 #define REG 1 macro
|
| D | nftw64.h | 61 #define REG 1 macro
|
| /external/mesa3d/src/freedreno/perfcntrs/ |
| D | fd2_perfcntr.c | 34 #define REG(_x) REG_A2XX_ ## _x macro
|
| D | fd5_perfcntr.c | 35 #define REG(_x) REG_A5XX_ ## _x macro
|
| D | fd6_perfcntr.c | 36 #define REG(_x) REG_A6XX_ ## _x macro
|
| /external/arm-trusted-firmware/plat/mediatek/mt8192/drivers/apusys/ |
| D | mtk_apusys_apc_def.h | 85 #define apuapc_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) argument
86 #define apuapc_readl(REG) mmio_read_32((uintptr_t)REG) argument
|
| /external/arm-trusted-firmware/fdts/ |
| D | fvp-defs.dtsi | 48 #define REG(c, p) \ macro
52 #define REG(c, p) \ macro
|
| /external/elfutils/libcpu/ |
| D | bpf_disasm.c | 55 #define REG(N) "r%" #N "$d" macro
|
| D | riscv_disasm.c | 80 #define REG(nr) ((char *) regnames[nr]) macro
|
| /external/arm-trusted-firmware/plat/mediatek/mt8192/drivers/devapc/ |
| D | devapc.h | 173 #define devapc_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) argument
174 #define devapc_readl(REG) mmio_read_32((uintptr_t)REG) argument
|
| /external/XNNPACK/scripts/ |
| D | convert-assembly-to-jit.py | 22 REG = r'(' + REG_NO_GROUP + ')' variable
|
| /external/igt-gpu-tools/tests/i915/ |
| D | gem_exec_parse.c | 505 #define REG(R, MSK, INI, V, OK, MIN_V) { #R, R, MSK, INI, V, OK, MIN_V } macro
|
| /external/igt-gpu-tools/benchmarks/ |
| D | gem_latency.c | 59 #define REG(x) (volatile uint32_t *)((volatile char *)igt_global_mmio + x) macro
|