Searched defs:RS1 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 130 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
142 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR()
148 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
154 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 126 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
138 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR()
144 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
150 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 882 unsigned RS1 = getRegState(Op1); in splitAslOr() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 922 unsigned RS1 = getRegState(Op1); in splitAslOr() local
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| /external/pcre/src/sljit/ |
| D | sljitNativeRISCV_common.c | 66 #define RS1(rs1) ((sljit_ins)reg_map[rs1] << 15) macro
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