Searched defs:RS2 (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 148 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcAsmPrinter.cpp | 144 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
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| /external/aac/libAACenc/src/ |
| D | metadata_compressor.cpp | 125 enum { L = 0, R = 1, C = 2, LFE = 3, LS = 4, RS = 5, S = 6, LS2 = 7, RS2 = 8 }; enumerator
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 883 unsigned RS2 = getRegState(Op2); in splitAslOr() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 923 unsigned RS2 = getRegState(Op2); in splitAslOr() local
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| /external/pcre/src/sljit/ |
| D | sljitNativeRISCV_common.c | 67 #define RS2(rs2) ((sljit_ins)reg_map[rs2] << 20) macro
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| /external/llvm/utils/TableGen/ |
| D | AsmMatcherEmitter.cpp | 1277 for (const RegisterSet &RS2 : RegisterSets) in buildRegisterClasses() local
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