Searched defs:RegB (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 434 bool isSubRegister(unsigned RegA, unsigned RegB) const { in isSubRegister()
442 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSubRegisterEq()
448 bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperRegisterEq()
454 bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperOrSubRegisterEq()
527 inline bool MCRegisterInfo::isSuperRegister(unsigned RegA, unsigned RegB) const{ in isSuperRegister()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 553 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister()
561 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq()
567 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq()
573 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq()
649 inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{ in isSuperRegister()
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| /external/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible()
674 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr()
693 unsigned RegA, unsigned RegB, in convertInstTo3Addr()
1456 unsigned RegB = 0; in processTiedPairs() local
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| D | TargetInstrInfo.cpp | 702 unsigned RegB = OpB.getReg(); in reassociateOps() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 561 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible()
712 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr()
731 unsigned RegA, unsigned RegB, in convertInstTo3Addr()
1515 unsigned RegB = 0; in processTiedPairs() local
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| D | ImplicitNullChecks.cpp | 287 Register RegB = MOB.getReg(); in canReorder() local
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| D | TargetInstrInfo.cpp | 810 Register RegB = OpB.getReg(); in reassociateOps() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 1981 for (auto &RegB : UsesB) { in isDependent() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 2103 for (auto &RegB : UsesB) { in isDependent() local
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